Description
The RX62N Group is built around the RX core and is equipped with 1 channel of EtherC x 2 channels(max) of USB 2.0 Full-Speed (Host, Function and OTG) and 1 channel of CAN (optional) as a communications interface. The products are designed to not put a restriction on applications based on their communication method; add-ons are used to achieve different communication methods. They are also equipped with a rich set of system fail-safe functions such as power-on reset (POR), low voltage detection (LVD), and an independent watchdog timer.The RX621 Group is built around the RX core and is equipped with 2 channels (max) of USB 2.0 full-speed (Host, Function and OTG) and 1 channel of CAN as a communications interface. The products are designed to not put a restriction on applications based on their communication method; add-ons are used to achieve different communication methods. They are also equipped with a rich set of system fail-safe functions such as power-on reset (POR), low voltage detection (LVD), and an independent watchdog timer.
- RX CPU
- o General registers: 32-bit x 16
- o Multiplier: 32-bit multiplier
- o Divider: Yes
- o Multiply-accumulator: Yes (two types: memory-to-memory operations and register-to-register operations)
- o Memory-protection unit (MPU)
- Maximum operating frequency 100MHz
- Power supply voltage 2.7 to 3.6V
- Floating-point processing unit Single-precision floating-point processing unit
- Flash ROM (for program storage) Max. 512KB
- Flash ROM (for data storage) 32KB
- RAM Max 96KB
- Direct memory access controller (DMAC) x 4 channels
- Data transfer controller (DTC)
- Direct memory access controller designed exclusively (EXDMAC) x 2 channels (Over 144-pin PKG Only)
- 16-bit multifunction timer pulse unit (MTU2) x 12 channels
- Port output enable
- 16-bit compare match timer x 4 channels
- 8-bit timer (TMR) x 4 channels
- 4-bit Programmable pulse generator (PPG) x 2 channels (max)
- 14-bit Independent watchdog timer (IWDT)
- 8-bit Watchdog timer (WDT)
- Real-time clock (RTC)
- Serial communication interface (SCI) x 6 channels
- I2C bus interface: Except 100-pin [2 channels], 100-pin [1channel]
- Serial peripheral interface (RSPI) x 2 channels
- SDRAM interface (max. 32-bit width; Over 144-pin PKG Only)
- A/D converter (10-bit) x 8 channels [4 channels x 2 units] or (12-bit) x 8 channels [8 channels x 1 unit] (12-bit and 10-bit can not use at the same time.)
- D/A converter (10-bit): Except 100-pin [2 channels], 100-pin [1channel]
- USB2.0FullSpeed: 176-pin [2 channels, H/F/OTG], Except 176-pin [1channel, H/F/OTG]
- EtherC with dedicated DMAC x 1 channel
- CRC calculator
- Low-speed on-chip oscillator (OCO)
- Power-on reset circuit (POR)
- Voltage detection circuit (LVD)
- Low power consumption 4 modes
- o Sleep mode
- o All-module clock stop mode
- o Software standby mode
- o Deep software standby mode
- ROM capacity, RAM capacity and data flash capacity 384 Kbytes/64 Kbytes/32 Kbytes
- CAN × 1 channel
- Package LFBGA176-0.80
