Описание
The Freescale MPC564xB-C family of MCUs offers a superior level of integration to address the growing need for enhanced feature sets and increased memory space in high-end automotive body control module (BCM), gateway and industrial applications.
- e200z4d dual issue, 32-bit core Power Architecture compliant CPU
- Up to 120 MHz
- 4 KB, 2/4-Way Set Associative Instruction Cache
- Variable length encoding (VLE)
- Embedded floating-point (FPU) unit
- Supports Nexus3+
- e200z0h single issue, 32-bit core Power Architecture compliant CPU
- Up to 80 MHz
- Variable length encoding (VLE)
- Supports Nexus3+
- Up to 3 MB on-chip flash memory: flash page buffers to improve access time
- Up to 256 KB on-chip SRAM
- 64 KB on-chip data flash memory to support EEPROM emulation
- Up to 16 semaphores across all slave ports
- User selectable MBIST
- Low-power modes supported: STOP, HALT, STANDBY
- 16 region Memory Protection Unit (MPU)
- Dual-core Interrupt Controller (INTC). Interrupt sources can be routed to e200z4d, e200z0h, or both.
- Crossbar switch architecture for concurrent access to peripherals, flash memory, and SRAM from multiple bus masters
- 32 channel eDMA controller with DMAMUX
- Timer supports input/output channels providing 16-bit input capture, output compare, and PWM functions (eMIOS)
- 2 analog-to-digital converters (ADC): one 10-bit and one 12-bit
- Cross Trigger Unit (CTU) to enable synchronization of ADC conversions with a timer event from the eMIOS or from the PIT
- Up to 8 serial peripheral interface (DSPI) modules
- Up to 10 serial communication interface (LINFlex) modules
- Up to 6 full CAN (FlexCAN) modules with 64 MBs each
- CAN Sampler to catch ID of CAN message
- 1 inter IC communication interface (I2C) module
- Up to 177 (LQFP) or 199 (BGA) configurable general purpose I/O pins
- 1 System Timer Module (STM) with four 32-bit compare channels
- Up to 8 periodic interrupt timers (PIT) with 32-bit counter resolution
