MCU 32-bit LPC12D00 ARM Cortex M0 RISC 128KB Flash 3.3V 100-Pin LQFP Tray, LPC12D27FBD100/301, NXP

LPC12Dxx microcontrollers are a compelling solution for safety-critical, high-reliability industrial automation and white good applications requiring support for segment LCD display. They are rated "high immunity" based on the Electrical Fast Transient (EFT) test conducted by Langer EMV-Technik GmbH per IEC 61697-1 recommendations and are IEC 60730 Class B-certified. LPC12Dxx microcontrollers include on-chip support for a segment LCD controller capable of driving any static or multiplexed LCD containing up to 160 segments (40 segments x 4 backplanes). They extend the feature set of LPC11Dxx microcontrollers with up to 128 kB of Flash and analog peripherals such as dual comparators with 32 levels of voltage reference, edge and level detection, and an output feedback loop.

  • LCD driver
    • 40 segments.
    • One to four backplanes.
    • On-chip display RAM with auto-increment addressing.
  • Processor core
    • ARM Cortex-M0 processor, running at frequencies of up to 45 MHz (one wait state from flash) or 30 MHz (zero wait states from flash). The LPC12D27 have a high score of over 45 in CoreMark CPU performance benchmark testing, equivalent to 1.51/MHz.
    • ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
    • Serial Wire Debug (SWD).
    • System tick timer.
  • Memory
    • 8 kB SRAM.
    • 128 kB on-chip flash programming memory.
    • In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
    • Includes ROM-based 32-bit integer division routines.
  • Clock generation unit
    • Crystal oscillator with an operating range of 1 MHz to 25 MHz.
    • 12 MHz Internal RC (IRC) oscillator trimmed to 1 % accuracy that can optionally be used as a system clock.
    • PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.
    • Clock output function with divider that can reflect the system oscillator clock, IRC clock, main clock, and Watchdog clock.
    • Real-Time Clock (RTC).
  • Digital peripherals
    • Micro DMA controller with 21 channels.
    • CRC engine.
    • Two UARTs with fractional baud rate generation and internal FIFO. One UART with RS-485 and modem support and one standard UART with IrDA.
    • SSP/SPI controller with FIFO and multi-protocol capabilities.
    • I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode. I2C-bus pins have programmable glitch filter.
    • Up to 40 General Purpose I/O (GPIO) pins with programmable pull-up resistor, open-drain mode, programmable digital input glitch filter, and programmable input inverter.
    • Programmable output drive on all GPIO pins. Four pins support high-current output drivers.
    • All GPIO pins can be used as edge and level sensitive interrupt sources.
    • Four general purpose counter/timers with four capture inputs and four match outputs (32-bit timers) or two capture inputs and two match outputs (16-bit timers).
    • Windowed WatchDog Timer (WWDT), IEC-60335 Class B certified.
  • Analog peripherals
    • One 8-channel, 10-bit ADC.
    • Two highly flexible analog comparators. Comparator outputs can be programmed to trigger a timer match signal or can be used to emulate 555 timer behavior.
  • Power
    • Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
    • Processor wake-up from Deep-sleep mode via start logic using 12 port pins.
    • Processor wake-up from Deep-power down and Deep-sleep modes via the RTC.
    • Brownout detect with three separate thresholds each for interrupt and forced reset.
    • Power-On Reset (POR).
    • Integrated PMU (Power Management Unit).
  • Unique device serial number for identification.
  • 3.3 V power supply.
  • Available as 100-pin LQFP package.

Характеристики

Program_memory_type

Flash

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGLS23365/PHGLS23365-1.pdf?hkey=52A5661711E402568146F3353EA87419

Special_features

LCD Controller

Schedule_b

8542310000

Program_memory_size

128 KB

Product_dimensions

14.1 x 14.1 x 1.45 mm

Pin_count

100

Operating_temperature

-40 to 85 °C

Operating_supply_voltage

3.3 V

Watchdog

1

Analog_comparators

2

Eccn

EAR99

Instruction_set_architecture

RISC

Htsn

8542310001

Тип интерфейса

I2C/SSP/SPI/UART

Device_core

ARM Cortex M0

Data_bus_width

32 Bit

Country_of_origin

Taiwan

Бренд

On_chip_adc

8-chx10-bit

Number_of_timers

4

Number_of_programmable_i_os

40

Msl_level

3

Mounting

Surface Mount

Max_speed

45 MHz

Lcd_segments

160

Lead_finish

Tin

Артикул: LPC12D27FBD100/301

Описание

LPC12Dxx microcontrollers are a compelling solution for safety-critical, high-reliability industrial automation and white good applications requiring support for segment LCD display. They are rated "high immunity" based on the Electrical Fast Transient (EFT) test conducted by Langer EMV-Technik GmbH per IEC 61697-1 recommendations and are IEC 60730 Class B-certified. LPC12Dxx microcontrollers include on-chip support for a segment LCD controller capable of driving any static or multiplexed LCD containing up to 160 segments (40 segments x 4 backplanes). They extend the feature set of LPC11Dxx microcontrollers with up to 128 kB of Flash and analog peripherals such as dual comparators with 32 levels of voltage reference, edge and level detection, and an output feedback loop.

  • LCD driver
    • 40 segments.
    • One to four backplanes.
    • On-chip display RAM with auto-increment addressing.
  • Processor core
    • ARM Cortex-M0 processor, running at frequencies of up to 45 MHz (one wait state from flash) or 30 MHz (zero wait states from flash). The LPC12D27 have a high score of over 45 in CoreMark CPU performance benchmark testing, equivalent to 1.51/MHz.
    • ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
    • Serial Wire Debug (SWD).
    • System tick timer.
  • Memory
    • 8 kB SRAM.
    • 128 kB on-chip flash programming memory.
    • In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
    • Includes ROM-based 32-bit integer division routines.
  • Clock generation unit
    • Crystal oscillator with an operating range of 1 MHz to 25 MHz.
    • 12 MHz Internal RC (IRC) oscillator trimmed to 1 % accuracy that can optionally be used as a system clock.
    • PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.
    • Clock output function with divider that can reflect the system oscillator clock, IRC clock, main clock, and Watchdog clock.
    • Real-Time Clock (RTC).
  • Digital peripherals
    • Micro DMA controller with 21 channels.
    • CRC engine.
    • Two UARTs with fractional baud rate generation and internal FIFO. One UART with RS-485 and modem support and one standard UART with IrDA.
    • SSP/SPI controller with FIFO and multi-protocol capabilities.
    • I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode. I2C-bus pins have programmable glitch filter.
    • Up to 40 General Purpose I/O (GPIO) pins with programmable pull-up resistor, open-drain mode, programmable digital input glitch filter, and programmable input inverter.
    • Programmable output drive on all GPIO pins. Four pins support high-current output drivers.
    • All GPIO pins can be used as edge and level sensitive interrupt sources.
    • Four general purpose counter/timers with four capture inputs and four match outputs (32-bit timers) or two capture inputs and two match outputs (16-bit timers).
    • Windowed WatchDog Timer (WWDT), IEC-60335 Class B certified.
  • Analog peripherals
    • One 8-channel, 10-bit ADC.
    • Two highly flexible analog comparators. Comparator outputs can be programmed to trigger a timer match signal or can be used to emulate 555 timer behavior.
  • Power
    • Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
    • Processor wake-up from Deep-sleep mode via start logic using 12 port pins.
    • Processor wake-up from Deep-power down and Deep-sleep modes via the RTC.
    • Brownout detect with three separate thresholds each for interrupt and forced reset.
    • Power-On Reset (POR).
    • Integrated PMU (Power Management Unit).
  • Unique device serial number for identification.
  • 3.3 V power supply.
  • Available as 100-pin LQFP package.

Детали

Program_memory_type

Flash

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGLS23365/PHGLS23365-1.pdf?hkey=52A5661711E402568146F3353EA87419

Special_features

LCD Controller

Schedule_b

8542310000

Program_memory_size

128 KB

Product_dimensions

14.1 x 14.1 x 1.45 mm

Pin_count

100

Operating_temperature

-40 to 85 °C

Operating_supply_voltage

3.3 V

Watchdog

1

Analog_comparators

2

Eccn

EAR99

Instruction_set_architecture

RISC

Htsn

8542310001

Тип интерфейса

I2C/SSP/SPI/UART

Device_core

ARM Cortex M0

Data_bus_width

32 Bit

Country_of_origin

Taiwan

Бренд

On_chip_adc

8-chx10-bit

Number_of_timers

4

Number_of_programmable_i_os

40

Msl_level

3

Mounting

Surface Mount

Max_speed

45 MHz

Lcd_segments

160

Lead_finish

Tin