MCU 16-Bit TLCS-900H CISC ROMLess 3.3V/5V 100-Pin LQFP, TMP95C265FG(CKJZ), Toshiba

TMP95CS265FG is a high-speed 16-bit microcontroller designed for the scale equipment.TMP95CS265FG comes in a 100-pin flat package.

  • High-speed 16-bit CPU (900/H CPU)
    • Instruction mnemonics are upward-compatible with
    • 16 Mbytes of linear address space
    • General-purpose registers and register banks
    • 16-bit multiplication and division instruction
    • Micro DMA: Four-channels (640 ns / 2 byte
  • Minimum instruction execution time: 160 n
  • Built-in RAM: 2 Kbytes Built-in ROM: NO ROM
  • External memory expansion
    • Expandable up to 16 Mby program/data area)
    • External data bus width in (AM8/16)
    • Can simultaneously support 8/16 bit width external data bus Dynamic data bus sizing
  • 8-bit timers: 8 channels
  • With event counter function: 2 channels
  • 16-bit timer/event counter: 2 channels

Характеристики

Schedule_b

8542310000

Max_speed

25 MHz

Operating_temperature

-20 to 70 °C

Pin_count

100

Product_dimensions

14 x 14 x 1.4 mm

Program_memory_type

ROMLess

Ram_size

0.25 KB

Screening_level

Commercial

On_chip_adc

8-chx10-bit

Specifications

http://toshiba.semicon-storage.com/info/docget.jsp?did=11452&prodName=TMP95C265FG

Supplier_package

LQFP

Watchdog

1

Operating_supply_voltage

3.3, 5 V

Number_of_timers

2

On_chip_dac

2-chx8-bit

Бренд

Instruction_set_architecture

CISC

Country_of_origin

Japan

Data_bus_width

16 Bit

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

SIO/UART

Number_of_programmable_i_os

55

Max_operating_supply_voltage

5.5 V

Min_operating_supply_voltage

2.7 V

Mounting

Surface Mount

Артикул: TMP95C265FG(CKJZ)

Описание

TMP95CS265FG is a high-speed 16-bit microcontroller designed for the scale equipment.TMP95CS265FG comes in a 100-pin flat package.

  • High-speed 16-bit CPU (900/H CPU)
    • Instruction mnemonics are upward-compatible with
    • 16 Mbytes of linear address space
    • General-purpose registers and register banks
    • 16-bit multiplication and division instruction
    • Micro DMA: Four-channels (640 ns / 2 byte
  • Minimum instruction execution time: 160 n
  • Built-in RAM: 2 Kbytes Built-in ROM: NO ROM
  • External memory expansion
    • Expandable up to 16 Mby program/data area)
    • External data bus width in (AM8/16)
    • Can simultaneously support 8/16 bit width external data bus Dynamic data bus sizing
  • 8-bit timers: 8 channels
  • With event counter function: 2 channels
  • 16-bit timer/event counter: 2 channels

Детали

Schedule_b

8542310000

Max_speed

25 MHz

Operating_temperature

-20 to 70 °C

Pin_count

100

Product_dimensions

14 x 14 x 1.4 mm

Program_memory_type

ROMLess

Ram_size

0.25 KB

Screening_level

Commercial

On_chip_adc

8-chx10-bit

Specifications

http://toshiba.semicon-storage.com/info/docget.jsp?did=11452&prodName=TMP95C265FG

Supplier_package

LQFP

Watchdog

1

Operating_supply_voltage

3.3, 5 V

Number_of_timers

2

On_chip_dac

2-chx8-bit

Бренд

Instruction_set_architecture

CISC

Country_of_origin

Japan

Data_bus_width

16 Bit

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

SIO/UART

Number_of_programmable_i_os

55

Max_operating_supply_voltage

5.5 V

Min_operating_supply_voltage

2.7 V

Mounting

Surface Mount