MCU 16-bit ST10 CISC/RISC 512KB Flash 5V 144-Pin PQFP T/R, ST10F276Z5Q3TR, STMicroelectronics

The ST10F276Z5 is a derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 32 million instructions per second) with high peripheral functionality and enhanced I/O-capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL. The ST10F276Z5 is processed in 0.18 µm CMOS technology. The MCU core and the logic is supplied with a 5 to 1.8V on-chip voltage regulator. The part is supplied with a single 5 V supply and I/Os work at 5V. The device is upward compatible with the ST10F269 device, with the following set of differences: Flash control interface is now based on STMicroelectronics third generation of stand-alone Flash memories (M29F400 series), with an embedded Program/Erase Controller. This completely frees up the CPU during programming or erasing the Flash. Only one supply pin (ex DC1 in ST10F269, renamed into V18 is used for decoupling the internally generated 1.8 V core logic supply. Do not connect this pin to 5.0 V external supply. Instead, this pin should be connected to a decoupling capacitor (ceramic type, typical value 10 nF, maximum value 100 nF).The AC and DC parameters are modified due to a difference in the maximum CPU frequency. A new VDD pin replaces DC2 of ST10F269.EA pin assumes a new alternate functionality: it is also used to provide a dedicated power supply (see VSTBY) to maintain biased a portion of the XRAM (16Kbytes) when STBY the main Power Supply of the device (VDD and consequently the internally generated V18) is turned off for low power mode, allowing data retention. V STBYvoltage shall be in the range 4.5-5.5 V, and a dedicated embedded low power voltage regulator is in charge to provide the 1.8 V for the RAM, the low-voltage section of the 32 kHz oscillator and the real-time clock module when not disabled. It is allowed to exceed the upper limit up to 6 V for a very short period of time during the global life of the device, and exceed the lower limit down to 4 V when RTC and 32 kHz on-chip oscillator are not used.A second ASC mapped on the XBUS is added (ASC0 of ST10F269 remains ASC0, while the new one is referred as XASC or simply as ASC1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic ASC, and the new XASC.A second PWM mapped on the XBUS is added (PWM of ST10F269 becomes here PWM0, while the new one is referred as XPWM or simply as PWM1).

  • Highly performance 16-bit CPU with DSP functions 31.25ns instruction cycle time at 64 MHz max CPU clock Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator Enhanced boolean bit manipulations Single-cycle context switching support
  • On-chip memories 512 Kbyte Flash memory (32-bit fetch) 320 Kbyte extension Flash memory (16-bit fetch) Single voltage Flash memories with erase/program controller and 100K erasing/programming cycles. Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I²C) 2 Kbyte internal RAM (IRAM) 66 Kbyte extension RAM (XRAM)
  • External bus Programmable external bus configuration & characteristics for different address ranges Five programmable chip-select signals Hold-acknowledge bus arbitration support
  • Interrupt 8-channel peripheral event controller for single cycle interrupt driven data transfer 16-priority-level interrupt system with 56 sources, sampling rate down to 15.6ns
  • Timers Two multi-functional general purpose timer units with 5 timers
  • Two 16-channel capture / compare units
  • 4-channel PWM unit + 4-channel XPWM
  • A/D converter 24-channel 10-bit 3 µs minimum conversion time
  • Serial channels Two synchronous/ asynchronous serial channels Two high-speed synchronous channels One I²C standard interface
  • 2 CAN 2.0B interfaces operating on 1 or 2 CAN busses (64 or 2×32 message, C-CAN version)
  • Fail-safe protection Programmable watchdog timer Oscillator watchdog
  • On-chip bootstrap loader
  • Clock generation On-chip PLL with 4 to 12 MHz oscillator Direct or prescaled clock input
  • Real time clock and 32 kHz on-chip oscillator
  • Up to 111 general purpose I/O lines Individually programmable as input, output or special function Programmable threshold (hysteresis)
  • Idle, Power-down and Standby modes
  • Single voltage supply: 5V ±10% (embedded regulator for 1.8 V core supply)
  • Характеристики

    Schedule_b

    8542310000

    Operating_supply_voltage

    5 V

    Operating_temperature

    -40 to 125 °C

    Pin_count

    144

    Product_dimensions

    28 x 28 x 3.4 mm

    Program_memory_size

    512 Kb

    Ram_size

    68 KB

    On_chip_adc

    24-chx10-bit

    Special_features

    CAN Controller

    Specifications

    http://www.st.com/web/en/resource/technical/document/datasheet/CD00115722.pdf

    Supplier_package

    PQFP

    Watchdog

    1

    Max_speed

    64 MHz

    Number_of_timers

    5

    Бренд

    Instruction_set_architecture

    CISC, RISC

    Data_bus_width

    16 Bit

    Device_core

    ST10

    Eccn

    3A991.A.2

    Htsn

    8542310001

    Тип интерфейса

    CAN/I2C

    Number_of_programmable_i_os

    111

    Lead_finish

    Matte Tin

    Max_expanded_memory_size

    16 MB

    Max_operating_supply_voltage

    5.5 V

    Max_processing_temp

    245

    Min_operating_supply_voltage

    4.5 V

    Mounting

    Surface Mount

    Msl_level

    3

    Артикул: ST10F276Z5Q3TR

    Описание

    The ST10F276Z5 is a derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 32 million instructions per second) with high peripheral functionality and enhanced I/O-capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL. The ST10F276Z5 is processed in 0.18 µm CMOS technology. The MCU core and the logic is supplied with a 5 to 1.8V on-chip voltage regulator. The part is supplied with a single 5 V supply and I/Os work at 5V. The device is upward compatible with the ST10F269 device, with the following set of differences: Flash control interface is now based on STMicroelectronics third generation of stand-alone Flash memories (M29F400 series), with an embedded Program/Erase Controller. This completely frees up the CPU during programming or erasing the Flash. Only one supply pin (ex DC1 in ST10F269, renamed into V18 is used for decoupling the internally generated 1.8 V core logic supply. Do not connect this pin to 5.0 V external supply. Instead, this pin should be connected to a decoupling capacitor (ceramic type, typical value 10 nF, maximum value 100 nF).The AC and DC parameters are modified due to a difference in the maximum CPU frequency. A new VDD pin replaces DC2 of ST10F269.EA pin assumes a new alternate functionality: it is also used to provide a dedicated power supply (see VSTBY) to maintain biased a portion of the XRAM (16Kbytes) when STBY the main Power Supply of the device (VDD and consequently the internally generated V18) is turned off for low power mode, allowing data retention. V STBYvoltage shall be in the range 4.5-5.5 V, and a dedicated embedded low power voltage regulator is in charge to provide the 1.8 V for the RAM, the low-voltage section of the 32 kHz oscillator and the real-time clock module when not disabled. It is allowed to exceed the upper limit up to 6 V for a very short period of time during the global life of the device, and exceed the lower limit down to 4 V when RTC and 32 kHz on-chip oscillator are not used.A second ASC mapped on the XBUS is added (ASC0 of ST10F269 remains ASC0, while the new one is referred as XASC or simply as ASC1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic ASC, and the new XASC.A second PWM mapped on the XBUS is added (PWM of ST10F269 becomes here PWM0, while the new one is referred as XPWM or simply as PWM1).

  • Highly performance 16-bit CPU with DSP functions 31.25ns instruction cycle time at 64 MHz max CPU clock Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator Enhanced boolean bit manipulations Single-cycle context switching support
  • On-chip memories 512 Kbyte Flash memory (32-bit fetch) 320 Kbyte extension Flash memory (16-bit fetch) Single voltage Flash memories with erase/program controller and 100K erasing/programming cycles. Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I²C) 2 Kbyte internal RAM (IRAM) 66 Kbyte extension RAM (XRAM)
  • External bus Programmable external bus configuration & characteristics for different address ranges Five programmable chip-select signals Hold-acknowledge bus arbitration support
  • Interrupt 8-channel peripheral event controller for single cycle interrupt driven data transfer 16-priority-level interrupt system with 56 sources, sampling rate down to 15.6ns
  • Timers Two multi-functional general purpose timer units with 5 timers
  • Two 16-channel capture / compare units
  • 4-channel PWM unit + 4-channel XPWM
  • A/D converter 24-channel 10-bit 3 µs minimum conversion time
  • Serial channels Two synchronous/ asynchronous serial channels Two high-speed synchronous channels One I²C standard interface
  • 2 CAN 2.0B interfaces operating on 1 or 2 CAN busses (64 or 2×32 message, C-CAN version)
  • Fail-safe protection Programmable watchdog timer Oscillator watchdog
  • On-chip bootstrap loader
  • Clock generation On-chip PLL with 4 to 12 MHz oscillator Direct or prescaled clock input
  • Real time clock and 32 kHz on-chip oscillator
  • Up to 111 general purpose I/O lines Individually programmable as input, output or special function Programmable threshold (hysteresis)
  • Idle, Power-down and Standby modes
  • Single voltage supply: 5V ±10% (embedded regulator for 1.8 V core supply)
  • Детали

    Schedule_b

    8542310000

    Operating_supply_voltage

    5 V

    Operating_temperature

    -40 to 125 °C

    Pin_count

    144

    Product_dimensions

    28 x 28 x 3.4 mm

    Program_memory_size

    512 Kb

    Ram_size

    68 KB

    On_chip_adc

    24-chx10-bit

    Special_features

    CAN Controller

    Specifications

    http://www.st.com/web/en/resource/technical/document/datasheet/CD00115722.pdf

    Supplier_package

    PQFP

    Watchdog

    1

    Max_speed

    64 MHz

    Number_of_timers

    5

    Бренд

    Instruction_set_architecture

    CISC, RISC

    Data_bus_width

    16 Bit

    Device_core

    ST10

    Eccn

    3A991.A.2

    Htsn

    8542310001

    Тип интерфейса

    CAN/I2C

    Number_of_programmable_i_os

    111

    Lead_finish

    Matte Tin

    Max_expanded_memory_size

    16 MB

    Max_operating_supply_voltage

    5.5 V

    Max_processing_temp

    245

    Min_operating_supply_voltage

    4.5 V

    Mounting

    Surface Mount

    Msl_level

    3