Описание
The PIC24F16KA102 family introduces a new line of extreme low-power Microchip devices: a 16-bit microcontroller family with a broad peripheral feature set and enhanced computational performance. It also offers a new migration option for those high-performance applications, which may be outgrowing their 8-bit platforms, but do not require the numerical processing power of a digital signal processor. Core Features 16-BIT ARCHITECTURE Central to all PIC24F devices is the 16-bit modified Harvard architecture, first introduced with Microchip’s dsPIC digital signal controllers. The PIC24F CPU core offers a wide range of enhancements, such as: 16-bit data and 24-bit address paths with the ability to move information between data and memory spaces Linear addressing of up to 12 Mbytes (program space) and 64 Kbytes (data) A 16-element working register array with built-in software stack support A 17 x 17 hardware multiplier with support for integer math Hardware support for 32-bit by 16-bit division An instruction set that supports multiple addressing modes and is optimized for high-level languages, such as C Operational performance up to 16 MIPS POWER-SAVING TECHNOLOGY All of the devices in the PIC24F16KA102 family incorporate a range of features that can significantly reduce power consumption during operation. Key items include: On-the-Fly Clock Switching: The device clock can be changed under software control to the Timer1 source or the internal, low-power RC oscillator during operation, allowing users to incorporate power-saving ideas into their software designs. Doze Mode Operation: When timing-sensitive applications, such as serial communications, require the uninterrupted operation of peripherals, the CPU clock speed can be selectively reduced, allowing incremental power savings without missing a beat. Instruction-Based Power-Saving Modes: There are three instruction-based power-saving modes: – Idle Mode: The core is shut down while leaving the peripherals active. – Sleep Mode: The core and peripherals that require the system clock are shut down, leaving the peripherals that use their own clock, or the clock from other devices, active. – Deep Sleep Mode: The core, peripherals (except RTCC and DSWDT), Flash and SRAM are shut down. OSCILLATOR OPTIONS AND FEATURES The PIC24F16KA102 family offers five different oscillator options, allowing users a range of choices in developing application hardware. These include: Two Crystal modes using crystals or ceramic resonators. Two External Clock modes offering the option of a divide-by-2 clock output. Two Fast Internal Oscillators (FRCs): One with a nominal 8 MHz output and the other with a nominal 500 kHz output. These outputs can also be divided under software control to provide clock speed as low as 31 kHz or 2 kHz. A Phase Locked Loop (PLL) frequency multiplier, available to the External Oscillator modes and the 8 MHz FRC oscillator, which allows clock speeds of up to 32 MHz. A separate Internal RC oscillator (LPRC) with a fixed 31 kHz output, which provides a low-power option for timing-insensitive applications.
- Power Management Modes:
- Run – CPU, Flash, SRAM and Peripherals On
- Doze – CPU Clock Runs Slower than Peripherals
- Idle – CPU Off, Flash, SRAM and Peripherals On
- Sleep – CPU, Flash and Peripherals Off and SRAM On
- Deep Sleep – CPU, Flash, SRAM and Most Peripherals Off:
- Run mode currents down to 8 µA typical
- Idle mode currents down to 2 µA typical
- Deep Sleep mode currents down to 20 nA typical
- RTCC 490 nA, 32 kHz, 1.8V
- Watchdog Timer 350 nA, 1.8V typical
- High-Performance CPU:
- Modified Harvard Architecture
- Up to 16 MIPS Operation @ 32 MHz
- 8 MHz Internal Oscillator with 4x PLL Option and Multiple Divide Options
- 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
- 32-Bit by 16-Bit Hardware Divider
- 16-Bit x 16-Bit Working Register Array
- C Compiler Optimized Instruction Set Architecture
- Peripheral Features:
- Hardware Real-Time Clock and Calendar (RTCC):
- Provides clock, calendar and alarm functions
- Can run in Deep Sleep Mode
- Programmable Cyclic Redundancy Check (CRC)
- Serial Communication modules:
- SPI, I2C™ and two UART modules
- Three 16-Bit Timers/Counters with Programmable Prescaler
- 16-Bit Capture Inputs
- 16-Bit Compare/PWM Output
- Configurable Open-Drain Outputs on Digital I/O Pins
- Up to Three External Interrupt Sources
- Analog Features:
- 10-Bit, up to 9-Channel Analog-to-Digital Converter:
- 500 ksps conversion rate
- Conversion available during Sleep and Idle
- Dual Analog Comparators with Programmable Input/ Output Configuration
- Charge Time Measurement Unit (CTMU):
- Used for capacitance sensing
- Time measurement, down to 1 ns resolution
- Delay/pulse generation, down to 1 ns resolution
- Special Microcontroller Features:
- Operating Voltage Range of 1.8V to 3.6V
- High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
- Flash Program Memory:
- Erase/write cycles: 10,000 minimum
- 40-years’ data retention minimum
- Data EEPROM:
- Erase/write cycles: 100,000 minimum
- 40-years’ data retention minimum
- Fail-Safe Clock Monitor
- System Frequency Range Declaration bits:
- Declaring the frequency range optimizes the current consumption.
- Flexible Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for Reliable Operation
- In-Circuit Serial Programming™ (ICSP™) and In-Circuit Debug (ICD) via two Pins
- Programmable High/Low-Voltage Detect (HLVD)
- Brown-out Reset (BOR):
- Standard BOR with three programmable trip points; can be disabled in Sleep
- Extreme Low-Power DSBOR for Deep Sleep, LPBOR for all other modes
