The MC9S12A512 MCU is a 16-bit device composed of standard on-chip peripherals, including a HCS12 CPU. System resource mapping, clock generation, interrupt control and bus interfacing are managed by the system integration module (SIM). The MC9S12A512 has full 16-bit data paths throughout, however the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The inclusion of a phase-lock loop (PLL) circuit allows power consumption and performance to be adjusted.
16-bit HCS12 CPU
Upward compatible with M68HC11 instruction set
Interrupt stacking and programmer"s model identical to M68HC11
Instruction pipe
Enhanced indexed addressing
Multiplexed external bus
Memory
512 KB flash EEPROM
4 KB EEPROM
14 KB RAM
Two asynchronous serial communications interfaces (SCI)
Three serial peripheral interfaces (SPI)
Two 8-channel ADCs
8-channel pulse-width modulator (PWM)
29 discrete digital I/O channels (Port A, Port B, Port K and Port E)
20 discrete digital I/O lines with interrupt and wake-up capability
Inter-IC Bus
10-bit resolution
Software-compatible modules
