Description
dsPIC33F General Purpose Digital Signal Controller (DSC) with seamless migration options to PIC24 MCUs and dsPIC30F DSCs in similar packages.
- Core:16-bit dsPIC33F CPU
- Code-efficient (C and Assembly) architecture
- Two 40-bit wide accumulators
- Single-cycle (MAC/MPY) with dual data fetch
- Single-cycle mixed-sign MUL plus hardware divide
- Clock Management
- ±2% internal oscillator
- Programmable PLLs and oscillator clock sources
- Fail-Safe Clock Monitor (FSCM)
- Independent Watchdog Timer (WDT)
- Fast wake-up and start-up
- Timers/Output Compare/Input Capture
- Up to nine 16-bit timers/counters. Can pair up to make four 32-bit timers.
- Eight Output Compare modules configurable as timers/counters
- Eight Input Capture modules
- Two UART modules (10 Mbps)- With support for LIN 2.0 protocols and IrDA
- Two 4-wire SPI modules (15 Mbps)
- Up to two I2C™ modules (up to 1 Mbaud) with SMBus support
- Up to two Enhanced CAN (ECAN) modules (1 Mbaud) with 2.0B support
- Quadrature Encoder Interface (QEI) module
- Data Converter Interface (DCI) module with I2S codec support
- AEC-Q100 REVG (Grade 1 -40°C to +125°C)
- AEC-Q100 REVG (Grade 0 -40°C to +150°C)
- Class B Safety Library, IEC 60730