Описание
MCU 16-bit dsPIC30 dsPIC RISC 12KB Flash 3.3V/5V 28-Pin QFN-S EP T/R
- Modified Harvard architecture
- C compiler optimized instruction set architecture
- 83 base instructions with flexible addressing modes
- 24-bit wide instructions, 16-bit wide data path
- 12 Kbytes on-chip Flash program space
- 512 bytes on-chip data RAM
- 1 Kbyte non-volatile data EEPROM
- 16 x 16-bit working register array
- Up to 30 MIPs operation:
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x)
- 27 interrupt sources
- Three external interrupt sources
- Eight user-selectable priority levels for each interrupt
- Four processor exceptions and software traps
- Enhanced Flash program memory:
- 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical)
- Data EEPROM memory:
- 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical)
- Self-reprogrammable under software control
- Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
- Flexible Watchdog Timer (WDT) with on-chip low-power RC oscillator for reliable operation
- Fail-Safe Clock Monitor (FSCM) operation
- Detects clock failure and switches to on-chip Low-Power RC (LPRC) oscillator
- Programmable code protection
- In-Circuit Serial Programming™ (ICSP™) programming capability
- Selectable Power Management modes
- Sleep, Idle and Alternate Clock modes
- Tape and Reel Packaging
