MCU 16-bit DSP5685x CISC 2KB ROM 1.8V/3.3V 128-Pin LQFP Tray, DSP56853FGE, NXP

The DSP56853 is a member of the DSP56800E core-based family of digital signal controllers. This device combines the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals on a single chip to create an extremely cost-effective solution. The DSP56853 includes peripherals that are especially useful for teledatacom devices, Internet appliances, portable devices, TAD, voice recognition, hands-free devices and general purpose applications. The DSP56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP and MCU applications. The instruction set is also highly efficient for C compilers to enable rapid development of optimized control applications.

  • 120 MIPS at 120 MHz
  • 12K x 16-bit program SRAM
  • 4K x 16-bit data SRAM
  • 1K x 16-bit boot ROM
  • Access up to 2M words of program memory or 8M of data memory
  • Chip select logic for glue-less interface to ROM and SRAM
  • Six (6) independent channels of DMA
  • Enhanced Synchronous Serial Interfaces (ESSI)
  • Two (2) Serial Communication Interfaces (SCI)
  • Serial Peripheral Interface (SPI)
  • 8-bit parallel host interface
  • General purpose 16-bit quad timer
  • JTAG/Enhanced On-Chip Emulation (OnCE) for unobtrusive, real-time debugging
  • Computer Operating Properly (COP)/watchdog timer
  • 128 LQFP package
  • Up to 41 GPIO
  • Характеристики

    Schedule_b

    8542310000

    Бренд

    Operating_temperature

    -40 to 85 °C

    Pin_count

    128

    Product_dimensions

    20 x 14 x 1.4 mm

    Program_memory_size

    2 KB

    Ram_size

    24 KB

    Screening_level

    Industrial

    Specifications

    https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGL-S-A0002259482/PHGL-S-A0002259482-1.pdf?hkey=52A5661711E402568146F3353EA87419

    Supplier_package

    LQFP

    Max_speed

    120 MHz

    Number_of_timers

    4

    Operating_supply_voltage

    1.8, 3.3 V

    Country_of_origin

    Taiwan

    Instruction_set_architecture

    CISC

    Data_bus_width

    16 Bit

    Eccn

    3A991

    Htsn

    8542310001

    Тип интерфейса

    SCI/SPI

    Number_of_programmable_i_os

    41

    Lead_finish

    Matte Tin

    Max_operating_supply_voltage

    1.98, 3.6 V

    Max_processing_temp

    260

    Min_operating_supply_voltage

    1.62, 3 V

    Mounting

    Surface Mount

    Msl_level

    3

    Артикул: DSP56853FGE

    Описание

    The DSP56853 is a member of the DSP56800E core-based family of digital signal controllers. This device combines the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals on a single chip to create an extremely cost-effective solution. The DSP56853 includes peripherals that are especially useful for teledatacom devices, Internet appliances, portable devices, TAD, voice recognition, hands-free devices and general purpose applications. The DSP56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP and MCU applications. The instruction set is also highly efficient for C compilers to enable rapid development of optimized control applications.

  • 120 MIPS at 120 MHz
  • 12K x 16-bit program SRAM
  • 4K x 16-bit data SRAM
  • 1K x 16-bit boot ROM
  • Access up to 2M words of program memory or 8M of data memory
  • Chip select logic for glue-less interface to ROM and SRAM
  • Six (6) independent channels of DMA
  • Enhanced Synchronous Serial Interfaces (ESSI)
  • Two (2) Serial Communication Interfaces (SCI)
  • Serial Peripheral Interface (SPI)
  • 8-bit parallel host interface
  • General purpose 16-bit quad timer
  • JTAG/Enhanced On-Chip Emulation (OnCE) for unobtrusive, real-time debugging
  • Computer Operating Properly (COP)/watchdog timer
  • 128 LQFP package
  • Up to 41 GPIO
  • Детали

    Schedule_b

    8542310000

    Бренд

    Operating_temperature

    -40 to 85 °C

    Pin_count

    128

    Product_dimensions

    20 x 14 x 1.4 mm

    Program_memory_size

    2 KB

    Ram_size

    24 KB

    Screening_level

    Industrial

    Specifications

    https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGL-S-A0002259482/PHGL-S-A0002259482-1.pdf?hkey=52A5661711E402568146F3353EA87419

    Supplier_package

    LQFP

    Max_speed

    120 MHz

    Number_of_timers

    4

    Operating_supply_voltage

    1.8, 3.3 V

    Country_of_origin

    Taiwan

    Instruction_set_architecture

    CISC

    Data_bus_width

    16 Bit

    Eccn

    3A991

    Htsn

    8542310001

    Тип интерфейса

    SCI/SPI

    Number_of_programmable_i_os

    41

    Lead_finish

    Matte Tin

    Max_operating_supply_voltage

    1.98, 3.6 V

    Max_processing_temp

    260

    Min_operating_supply_voltage

    1.62, 3 V

    Mounting

    Surface Mount

    Msl_level

    3