MCU 16-Bit C166 CISC/RISC ROMLess 5V 144-Pin MQFP, SAB-C167CS-LM CA+, Infineon

The C167CS is an improved representative of the full featured 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 12.5/16.5 million instructions per second) with high peripheral functionality and means for power reduction.

  • 80/60 ns minimum instruction cycle time, with most instructions executed in 1 cycle
  • 400/300 ns multiplication (16-bit ´ 16-bit), 800/600 ns division (32-bit/16-bit)
  • Multiple high bandwidth internal data buses
  • Register based design with multiple variable register banks
  • Single cycle context switching support
  • 16 MBytes linear address space for code and data (Von Neumann architecture)
  • System stack cache support with automatic stack overflow/underflow detection
  • Bit, byte, and word data types
  • Flexible and efficient addressing modes for high code density
  • Enhanced boolean bit manipulation with direct addressability of 6 Kbits for peripheral control and user defined flags
  • Hardware traps to identify exception conditions during runtime
  • HLL support for semaphore operations and efficient data access
  • 3 KByte internal RAM for variables, register banks, system stack and code
  • 8 KByte on-chip high-speed XRAM for variables, user stack and code
  • 32 KByte on-chip ROM (not for ROMless devices)
  • Multiplexed or demultiplexed bus configurations
  • Segmentation capability and chip select signal generation
  • 8-bit or 16-bit data bus
  • Bus cycle characteristics selectable for five programmable address areas
  • 56 interrupt nodes with separate interrupt vectors
  • 240/180 ns typical interrupt latency (400/300 ns maximum) in case of internal program execution
  • Fast external interrupts
  • Interrupt driven single cycle data transfer
  • Transfer count option (std. CPU interrupt after programmable number of PEC transfers)
  • Eliminates overhead of saving and restoring system state for interrupt requests
  • 24-channel 10-bit A/D Converter with programmable conversion time (7.76 ms minimum), auto scan modes, channel injection mode
  • Two 16-channel Capture/Compare Units with 2 independent time bases each, very flexible PWM unit/event recording unit with different operating modes, includes four 16-bit timers/counters, maximum resolution fCPU/8
  • 4-channel PWM unit
  • Two Multifunctional General Purpose Timer Units
    • GPT1: Three 16-bit timers/counters, maximum resolution fCPU/8
    • GPT2: Two 16-bit timers/counters, maximum resolution fCPU/4

Характеристики

Schedule_b

8542390000

Operating_supply_voltage

5 V

Operating_temperature

0 to 70 °C

Pin_count

144

Product_dimensions

28 x 28 x 3.32

Program_memory_type

ROMLess

Ram_size

11 KB

Screening_level

Commercial

On_chip_adc

24-chx10-bit

Specifications

http://www.infineon.com/dgdl/Infineon-C167CS4R-DS-v02_02-en1.pdf?fileId=db3a304412b407950112b41e5afd3295&ack=t

Supplier_package

MQFP

Watchdog

1

Max_speed

25 MHz

Number_of_timers

5

Бренд

Instruction_set_architecture

CISC, RISC

Country_of_origin

United States

Data_bus_width

16 Bit

Device_core

C166

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

ASC/CAN/SSC

Number_of_programmable_i_os

111

Lead_finish

Tin

Max_expanded_memory_size

16 MB

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1500 mW

Max_processing_temp

250

Min_operating_supply_voltage

4.5 V

Mounting

Surface Mount

Msl_level

3

Артикул: SAB-C167CS-LM CA+

Описание

The C167CS is an improved representative of the full featured 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 12.5/16.5 million instructions per second) with high peripheral functionality and means for power reduction.

  • 80/60 ns minimum instruction cycle time, with most instructions executed in 1 cycle
  • 400/300 ns multiplication (16-bit ´ 16-bit), 800/600 ns division (32-bit/16-bit)
  • Multiple high bandwidth internal data buses
  • Register based design with multiple variable register banks
  • Single cycle context switching support
  • 16 MBytes linear address space for code and data (Von Neumann architecture)
  • System stack cache support with automatic stack overflow/underflow detection
  • Bit, byte, and word data types
  • Flexible and efficient addressing modes for high code density
  • Enhanced boolean bit manipulation with direct addressability of 6 Kbits for peripheral control and user defined flags
  • Hardware traps to identify exception conditions during runtime
  • HLL support for semaphore operations and efficient data access
  • 3 KByte internal RAM for variables, register banks, system stack and code
  • 8 KByte on-chip high-speed XRAM for variables, user stack and code
  • 32 KByte on-chip ROM (not for ROMless devices)
  • Multiplexed or demultiplexed bus configurations
  • Segmentation capability and chip select signal generation
  • 8-bit or 16-bit data bus
  • Bus cycle characteristics selectable for five programmable address areas
  • 56 interrupt nodes with separate interrupt vectors
  • 240/180 ns typical interrupt latency (400/300 ns maximum) in case of internal program execution
  • Fast external interrupts
  • Interrupt driven single cycle data transfer
  • Transfer count option (std. CPU interrupt after programmable number of PEC transfers)
  • Eliminates overhead of saving and restoring system state for interrupt requests
  • 24-channel 10-bit A/D Converter with programmable conversion time (7.76 ms minimum), auto scan modes, channel injection mode
  • Two 16-channel Capture/Compare Units with 2 independent time bases each, very flexible PWM unit/event recording unit with different operating modes, includes four 16-bit timers/counters, maximum resolution fCPU/8
  • 4-channel PWM unit
  • Two Multifunctional General Purpose Timer Units
    • GPT1: Three 16-bit timers/counters, maximum resolution fCPU/8
    • GPT2: Two 16-bit timers/counters, maximum resolution fCPU/4

Детали

Schedule_b

8542390000

Operating_supply_voltage

5 V

Operating_temperature

0 to 70 °C

Pin_count

144

Product_dimensions

28 x 28 x 3.32

Program_memory_type

ROMLess

Ram_size

11 KB

Screening_level

Commercial

On_chip_adc

24-chx10-bit

Specifications

http://www.infineon.com/dgdl/Infineon-C167CS4R-DS-v02_02-en1.pdf?fileId=db3a304412b407950112b41e5afd3295&ack=t

Supplier_package

MQFP

Watchdog

1

Max_speed

25 MHz

Number_of_timers

5

Бренд

Instruction_set_architecture

CISC, RISC

Country_of_origin

United States

Data_bus_width

16 Bit

Device_core

C166

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

ASC/CAN/SSC

Number_of_programmable_i_os

111

Lead_finish

Tin

Max_expanded_memory_size

16 MB

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1500 mW

Max_processing_temp

250

Min_operating_supply_voltage

4.5 V

Mounting

Surface Mount

Msl_level

3