MCU 16-Bit C166 CISC/RISC ROMLess 5V 128-Pin TQFP Tray, C161JCLFCAKXQMA1, Infineon

The C161CS derivatives are high performance derivatives of the Infineon C166 Family of full featured single-chip CMOS microcontrollers. They combine high CPU performance (up to 12.5 million instructions per second) with high peripheral functionality and enhanced IO-capabilities. They also provide clock generation via PLL and various on-chip memory modules such as program ROM, internal RAM, and extension RAM.

  • High Performance 16-bit CPU with 4-Stage Pipeline
    • 80 ns Instruction Cycle Time at 25 MHz CPU Clock
    • 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit)
    • Enhanced Boolean Bit Manipulation Facilities
    • Additional Instructions to Support HLL and Operating Systems
    • Register-Based Design with Multiple Variable Register Banks
    • Single-Cycle Context Switching Support
    • 16 MBytes Total Linear Address Space for Code and Data
  • 16-Priority-Level Interrupt System with 59 Sources, Sample-Rate down to 40 ns
  • 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
  • Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5)
  • On-Chip Memory Modules
    • 2 KBytes On-Chip Internal RAM (IRAM)
    • 8 KBytes On-Chip Extension RAM (XRAM)
    • 256 KBytes On-Chip Mask ROM
  • On-Chip Peripheral Modules
    • 12-Channel 10-bit A/D Converter with Programmable Conversion Time down to 7.8 µs
    • Two 16-Channel Capture/Compare Units (eight IO lines each)
    • Two Multi-Functional General Purpose Timer Units with 5 Timers
    • Two Asynchronous/Synchronous Serial Channels
    • High-Speed Synchronous Serial Channel (SPI)
  • Up to 16 MBytes External Address Space for Code and Data
    • Programmable External Bus Characteristics for Different Address Ranges Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit Data Bus Width
    • Five Programmable Chip-Select Signals
  • Programmable Watchdog Timer and Oscillator Watchdog
  • On-Chip Bootstrap Loader
  • 128-Pin TQFP Package

Характеристики

Schedule_b

8542310000

Operating_supply_voltage

5.0000 V

Operating_temperature

-40 to 125 °C

Pin_count

128

Product_dimensions

20 x 20 x 1.4 mm

Program_memory_type

ROMLess

Ram_size

1.25 KB

Screening_level

Automotive

On_chip_adc

12-chx10-bit

Special_features

CAN Controller

Specifications

https://www.infineon.com/dgdl/Infineon-C161CSR-DS-v03_00-EN.pdf?fileId=5546d4624a0bf290014a153f10095636&ack=t

Supplier_package

TQFP

Watchdog

1

Max_speed

25 MHz

Number_of_timers

5

Бренд

Instruction_set_architecture

CISC, RISC

Data_bus_width

16 Bit

Device_core

C166

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

CAN/SDLM

Number_of_programmable_i_os

93

Max_expanded_memory_size

16 MB

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1500 mW

Min_operating_supply_voltage

4.5 V

Mounting

Surface Mount

Msl_level

3

Артикул: C161JCLFCAKXQMA1

Описание

The C161CS derivatives are high performance derivatives of the Infineon C166 Family of full featured single-chip CMOS microcontrollers. They combine high CPU performance (up to 12.5 million instructions per second) with high peripheral functionality and enhanced IO-capabilities. They also provide clock generation via PLL and various on-chip memory modules such as program ROM, internal RAM, and extension RAM.

  • High Performance 16-bit CPU with 4-Stage Pipeline
    • 80 ns Instruction Cycle Time at 25 MHz CPU Clock
    • 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit)
    • Enhanced Boolean Bit Manipulation Facilities
    • Additional Instructions to Support HLL and Operating Systems
    • Register-Based Design with Multiple Variable Register Banks
    • Single-Cycle Context Switching Support
    • 16 MBytes Total Linear Address Space for Code and Data
  • 16-Priority-Level Interrupt System with 59 Sources, Sample-Rate down to 40 ns
  • 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
  • Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5)
  • On-Chip Memory Modules
    • 2 KBytes On-Chip Internal RAM (IRAM)
    • 8 KBytes On-Chip Extension RAM (XRAM)
    • 256 KBytes On-Chip Mask ROM
  • On-Chip Peripheral Modules
    • 12-Channel 10-bit A/D Converter with Programmable Conversion Time down to 7.8 µs
    • Two 16-Channel Capture/Compare Units (eight IO lines each)
    • Two Multi-Functional General Purpose Timer Units with 5 Timers
    • Two Asynchronous/Synchronous Serial Channels
    • High-Speed Synchronous Serial Channel (SPI)
  • Up to 16 MBytes External Address Space for Code and Data
    • Programmable External Bus Characteristics for Different Address Ranges Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit Data Bus Width
    • Five Programmable Chip-Select Signals
  • Programmable Watchdog Timer and Oscillator Watchdog
  • On-Chip Bootstrap Loader
  • 128-Pin TQFP Package

Детали

Schedule_b

8542310000

Operating_supply_voltage

5.0000 V

Operating_temperature

-40 to 125 °C

Pin_count

128

Product_dimensions

20 x 20 x 1.4 mm

Program_memory_type

ROMLess

Ram_size

1.25 KB

Screening_level

Automotive

On_chip_adc

12-chx10-bit

Special_features

CAN Controller

Specifications

https://www.infineon.com/dgdl/Infineon-C161CSR-DS-v03_00-EN.pdf?fileId=5546d4624a0bf290014a153f10095636&ack=t

Supplier_package

TQFP

Watchdog

1

Max_speed

25 MHz

Number_of_timers

5

Бренд

Instruction_set_architecture

CISC, RISC

Data_bus_width

16 Bit

Device_core

C166

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

CAN/SDLM

Number_of_programmable_i_os

93

Max_expanded_memory_size

16 MB

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1500 mW

Min_operating_supply_voltage

4.5 V

Mounting

Surface Mount

Msl_level

3