MCU 16-bit C166 CISC/RISC ROMLess 5V 128-Pin TQFP, SABC161CSLFCA, Infineon

The C161CS is an improved representative of the Infineon family of full featured 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 12.5/16.5 million instructions per second) with high peripheral functionality and means for power reduction.. Several key features contribute to the high performance of the C161CS (the indicated timings refer to a CPU clock of 25/33 MHz).

  • 80/60 ns minimum instruction cycle time, with most instructions executed in 1 cycle
  • 400/300 ns multiplication (16-bit × 16-bit), 800/600 ns division (32-bit / 16-bit)
  • Multiple high bandwidth internal data buses
  • Register based design with multiple variable register banks
  • Single cycle context switching support
  • 16 MBytes linear address space for code and data (Von Neumann architecture)
  • System stack cache support with automatic stack overflow/underflow detection

Характеристики

Schedule_b

8542390000

Operating_supply_voltage

5 V

Operating_temperature

0 to 70 °C

Pin_count

128

Product_dimensions

20 x 20 x 1.4 mm

Program_memory_type

ROMLess

Ram_size

10 KB

On_chip_adc

12-chx10-bit

Specifications

http://www.infineon.com/dgdl/Infineon-C161CSR-DS-v03_00-en.pdf?fileId=db3a304412b407950112b41e4b55323c&ack=t

Supplier_package

TQFP

Watchdog

1

Max_speed

25 MHz

Number_of_timers

5

Бренд

Instruction_set_architecture

CISC, RISC

Country_of_origin

United States

Data_bus_width

16 Bit

Eccn

EAR99

Htsn

8542390001

Тип интерфейса

SDLM

Number_of_programmable_i_os

93

Lead_finish

Matte Tin

Max_expanded_memory_size

16 MB

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1500 mW

Max_processing_temp

260

Min_operating_supply_voltage

4.5 V

Mounting

Surface Mount

Msl_level

3

Артикул: SABC161CSLFCA

Описание

The C161CS is an improved representative of the Infineon family of full featured 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 12.5/16.5 million instructions per second) with high peripheral functionality and means for power reduction.. Several key features contribute to the high performance of the C161CS (the indicated timings refer to a CPU clock of 25/33 MHz).

  • 80/60 ns minimum instruction cycle time, with most instructions executed in 1 cycle
  • 400/300 ns multiplication (16-bit × 16-bit), 800/600 ns division (32-bit / 16-bit)
  • Multiple high bandwidth internal data buses
  • Register based design with multiple variable register banks
  • Single cycle context switching support
  • 16 MBytes linear address space for code and data (Von Neumann architecture)
  • System stack cache support with automatic stack overflow/underflow detection

Детали

Schedule_b

8542390000

Operating_supply_voltage

5 V

Operating_temperature

0 to 70 °C

Pin_count

128

Product_dimensions

20 x 20 x 1.4 mm

Program_memory_type

ROMLess

Ram_size

10 KB

On_chip_adc

12-chx10-bit

Specifications

http://www.infineon.com/dgdl/Infineon-C161CSR-DS-v03_00-en.pdf?fileId=db3a304412b407950112b41e4b55323c&ack=t

Supplier_package

TQFP

Watchdog

1

Max_speed

25 MHz

Number_of_timers

5

Бренд

Instruction_set_architecture

CISC, RISC

Country_of_origin

United States

Data_bus_width

16 Bit

Eccn

EAR99

Htsn

8542390001

Тип интерфейса

SDLM

Number_of_programmable_i_os

93

Lead_finish

Matte Tin

Max_expanded_memory_size

16 MB

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1500 mW

Max_processing_temp

260

Min_operating_supply_voltage

4.5 V

Mounting

Surface Mount

Msl_level

3