Описание
The TMS570LS series is a high performance automotive grade microcontrollerfamily which has been certified for use in IEC 61508 SIL3 safety systems. Thesafety architecture includes Dual CPUs in lockstep, CPU and Memory Built-InSelf Test (BIST) logic, ECC on both the Flash and the data SRAM, parity onperipheral memories, and loop back capability on peripheral IOs. The TMS570LS family integrates the ARM® Cortex-R4F Floating Point CPUwhich offers an efficient 1.6 DMIPS/MHz, and has configurations which can runup to 160 MHz providing more than 250 DMIPS. The TMS570LS series also providesdifferent Flash (1MB or 2MB) and data SRAM (128KB or 160KB) options withsingle bit error correction and double bit error detection. The TMS570LS devices feature peripherals for real-time control-basedapplications, including up to 32 nHET timer channels and two 12-bit A to Dconverters supporting up to 24 inputs. There are multiple communicationinterfaces including a 2-channel FlexRay, 3 CAN controllers supporting 64mailboxes each, and 2 LIN/UART controllers. With integrated SIL3 certified safety features and a wide choice ofcommunication and control peripherals, the TMS570LS series is an idealsolution for high performance real time control applications with safetycritical requirements. The devices included in the TMS570LS series and described in this documentare: TMS570LS20216 TMS570LS20206 TMS570LS10216 TMS570LS10206 TMS570LS10116 TMS570LS10106 The TMS570LS series microcontrollers contain the following: Dual TMS570 16/32-Bit RISC (ARM Cortex-R4F) in Lockstep Up to 2M-Byte Program Flash with ECC Up to 160K-Byte Static RAM (SRAM) with ECC Real-Time Interrupt (RTI) Operating System Timer Vectored Interrupt Module (VIM) Cyclic Redundancy Checker (CRC) with Parallel Signature Analysis (PSA) Direct Memory Access (DMA) Controller Frequency-Modulated Phase-Locked Loop (FMzPLL)-Based Clock Module WithPrescaler Three Multi-buffered Serial Peripheral Interfaces (MibSPI) Two UARTs (SCI) with Local Interconnect Network Interfaces (LIN) Three CAN Controllers (DCAN) High-End Timer (NHET) with dedicated Transfer Unit (HTU) Available FlexRay Controller with dedicated PLL and Transfer Unit (FTU) External Clock Prescale (ECP) Module Two 16-Channel 12-Bit Multi-Buffered ADCs (MibADC) – 8 shared channels between the two ADCs Address Bus Parity with Failure Detection Error Signaling Module (ESM) with external error pin Voltage Monitor (VMON) with out of range reset assertion Embedded Trace Module (ETMR4) Data Modification Module (DMM) RAM Trace Port (RTP) Parameter Overlay Module (POM) 16 Dedicated General-Purpose I/O (GIO) Pins for ZWT; 8 Dedicated GIOPins for PGE 115 Total Peripheral I/Os for ZWT; 68 Total Peripheral I/Os for PGE 16-Bit External Memory Interface (EMIF) The devices utilize the big-endian format where the most significant byteof a word is stored at the lowest numbered byte and the least significant byteat the highest numbered byte.
- Certified for use in SIL3 Applications
- Dual CPUs running in Lockstep
- ECC on Flash and SRAM
- CPU and Memory BIST (Built-In Self Test)
- Error Signaling Module (ESM) w/ Error Pin
- Efficient 1.6 DMIPS/MHz with 8-stage pipeline
- Floating Point Unit with Single/Double Precision
- Memory Protection Unit (MPU)
- Open Architecture With Third-Party Support
- Up to 160-MHz System Clock
- Core Supply Voltage (VCC): 1.5 V
- I/O Supply Voltage (VCCIO): 3.3 V
- 1M-Byte or 2M-Byte Flash with ECC
- 128K-Byte or 160K-Byte RAM with ECC
- 16bit Data, 22bit Address, 4 Chip Selects
- Consistent Memory Map across the family
- Real-Time Interrupt (RTI) OS Timer
- Vectored Interrupt Module (VIM)
- Cyclic Redundancy Checker (CRC)
- 32 Control Packets and 16 Channels
- Parity on Control Packet Memory
- Dedicated Memory Protection Unit (MPU)
- Oscillator and PLL clock monitor
- 16 Dedicated GIO – 8 w/ External Interrupts
- Programmable External Clock (ECLK)
- Three Multi-buffered Serial Peripheral Interface (MibSPI) each with:
- Four Chip Selects and one Enable pin
- 128 buffers with parity
- One with parallel mode
- Two UART (SCI) interfaces with Local Interconnect Network Interface (LIN 2.0)
- Three CAN (DCAN) Controller
- Two with 64 mailboxes, one with 32
- Parity on mailbox RAM
- Dual Channel FlexRay™ Controller
- 8K-Byte message RAM with parity
- Transfer Unit with MPU and parity
- 32 Programmable I/O Channels
- 128 Words High-End Timer RAM with parity
- Transfer Unit with MPU and parity
- 24 total ADC Input channels
- Each has 64 Buffers with parity
- Embedded Trace Module (ETMR4)
- Data Modification Module (DMM)
- RAM Trace Port (RTP)
- Parameter Overlay Module (POM)
- Development Boards
- Code Composer Studio Integrated Development Environment (IDE)
- HaLCoGen Code Generation Tool
- HET Assembler and Simulator
- nowFlash Flash Programming Tool
- 144-Pin Quad Flat Pack (PGE) [Green]
- 337-Pin Ball Grid Array (ZWT) [Green]
- TI E2E Community