Description
TheRM48Lx30 device is ahigh-performance microcontroller family forsafety systems. The safety architecture includesdual CPUs in lockstep, CPUand memory BIST logic, ECC on both the flash and the data SRAM, parityonperipheral memories, and loopback capability on peripheral I/Os. The RM48Lx30deviceintegrates the ARM Cortex-R4FFloating-Point CPU. The CPU offers an efficient 1.66 DMIPS/MHz, and hasconfigurations thatcan run up to 200MHz, providing up to 332 DMIPS.The device supports thelittle-endian [LE]format. The RM48L930 device has 3MB ofintegrated flash and 256KB of data RAM.The RM48L730 has 2MB of integrated flash and 256KB of dataRAM. The RM48L530device has 2MB of integrated flash and 192KB of data RAM.Both the flash and RAM have single-bit error correction and double-bit error detection. The flashmemory on thisdevice is a nonvolatile, electrically erasable, andprogrammable memory implemented with a64-bit-wide data bus interface. Theflash operates on a 3.3-V supply input (same level as I/Osupply) for allread, program, and erase operations. When in pipeline mode, the flash operateswitha system clock frequency of up to 200 MHz.The SRAM supportssingle-cycle read and write accesses in byte, halfword, word, and double-word modes. The RM48Lx30devicefeatures peripherals for real-time control-basedapplications, including twoNext Generation High-End Timer (N2HET) timingcoprocessors and two 12-bit Analog-to-DigitalConverters (ADCs) supporting upto 24 inputs. The N2HET is an advanced intelligent timer that provides sophisticated timingfunctionsfor real-time applications. The timer is software-controlled, usinga reduced instruction set, witha specialized timer micromachine and anattached I/O port. The N2HET can be used forpulse-width-modulated outputs,capture or compare inputs, or GPIO. The N2HET is especially wellsuited forapplications requiring multiple sensor information and drive actuators withcomplex andaccurate time pulses. A High-End Timer Transfer Unit (HTU) canperform DMA-type transactions totransfer N2HET data to or from main memory.A Memory Protection Unit (MPU) is built into theHTU. Thedevice has two 12-bit-resolution MibADCs with 24 channels and 64 wordsof parity-protected bufferRAM each. The MibADC channels can be convertedindividually or can be grouped by software forsequential conversionsequences. Sixteen channels are shared between the two MibADCs. There are three separate groupings. Each sequence can be converted once when triggered orconfigured forcontinuous conversion mode. The MibADC has a 10-bit mode foruse when compatibility with olderdevices or faster conversion time isdesired. Thedevice has multiple communication interfaces: three MibSPIs,two SPIs, one LIN, one SCI, three DCANs,and one I2C module. The SPIsprovidea convenient method of serial high-speed communication between similarshift-register typedevices. The LIN supports the Local Interconnect standard2.0 and can be used as a UART infull-duplex mode using the standardNon-Return-to-Zero (NRZ) format. TheDCAN supports the CAN 2.0 (A and B) protocol standard and uses aserial, multimaster communicationprotocol that efficiently supportsdistributed real-time control with robust communication rates ofup to 1Mbps. The DCAN is ideal for systems operating in noisy and harsh environments(for example,automotive vehicle networking and industrial fieldbus) thatrequire reliable serial communicationor multiplexed wiring.
- High-Performance Microcontroller for Safety-Critical Applications
- Dual CPUs Running inLockstep
- ECC on Flash and RAM Interfaces
- Built-In Self-Test(BIST) for CPU and On-chip RAMs
- Error Signaling Module With ErrorPin
- Voltage and Clock Monitoring
- ARM Cortex-R4F 32-Bit RISC CPU
- Efficient 1.66DMIPS/MHz With 8-Stage Pipeline
- FPU With Single- andDouble-Precision
- 12-Region Memory Protection Unit(MPU)
- Open Architecture With Third-Party Support
- Operating Conditions
- SystemClock up to 200 MHz
- Core Supply Voltage (VCC): 1.2 V Nominal
- I/O SupplyVoltage (VCCIO): 3.3 V Nominal
- ADC Supply Voltage(VCCAD): 3.0 to 5.25 V
- Integrated Memory
- 3MB ofProgram Flash With ECC(RM48L930)
- 2MBof Program Flash With ECC(RM48L730/530)
- 256KB of RAMWith ECC(RM48L930/730)
- 192KB of RAM With ECC (RM48L530)
- 64KB of Flash With ECC for EmulatedEEPROM
- 16-Bit External Memory Interface
- Common Platform Architecture
- Consistent Memory Map AcrossFamily
- Real-Time Interrupt (RTI) Timer OS Timer
- 96-ChannelVectored Interrupt Module (VIM)
- 2-Channel Cyclic Redundancy Checker(CRC)
- Direct Memory Access (DMA) Controller
- 16 Channels and 32 Peripheral Requests
- ParityProtection for Control Packet RAM
- DMA Accesses Protected by DedicatedMPU
- Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In SlipDetector
- Separate Nonmodulating PLL
- Trace and Calibration Capabilities
- Embedded Trace Macrocell (ETM-R4)
- DataModification Module (DMM)
- RAM Trace Port (RTP)
- Parameter Overlay Module(POM)
- Multiple Communication Interfaces
- USB
- 2-Port USB Host Controller
- One Full-SpeedUSB Device Port
- Three CAN Controllers(DCANs)
- 64 Mailboxes, Each With ParityProtection
- Compliant to CAN Protocol Version2.0B
- Standard Serial Communication Interface(SCI)
- Local Interconnect Network (LIN) InterfaceController
- Compliant to LIN Protocol Version 2.1
- Can beConfigured as a Second SCI
- Inter-Integrated Circuit(I2C)
- Three Multibuffered Serial PeripheralInterfaces (MibSPIs)
- 128 Words With Parity ProtectionEach
- TwoStandard Serial Peripheral Interfaces (SPIs)
- USB
- Two Next Generation High-End Timer (N2HET) Modules
- N2HET1: 32 ProgrammableChannels
- N2HET2: 18 Programmable Channels
- 160-WordInstruction RAM Each With Parity Protection
- Each N2HET Includes Hardware AngleGenerator
- Dedicated High-End Transfer Unit (HTU) With MPU for Each N2HET
- Two 12-Bit Multibuffered ADC Modules
- ADC1: 24 Channels
- ADC2: 16 Channels Shared WithADC1
- 64 Result Buffers With Parity Protection Each
- General-Purpose Input/Output (GPIO) Pins Capable of GeneratingInterrupts
- 16 Pins on the ZWT Package
- 10 Pins on the PGEPackage
- IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components
- JTAG Security Module
- Packages
- 144-PinQuad Flatpack (PGE) [Green]
- 337-BallGrid Array (ZWT) [Green]
