MCU 16-bit/32-bit H8 CISC 32KB Flash 5V 64-Pin LQFP, HD64F3664FPJ, Renesas Electronics

The H8/3664 Group are single-chip microcomputers made up of the high-speed H8/300H CPU employing Renesas Technology original architecture as their cores, and the peripheral functions required to configure a system. The H8/300H CPU has an instruction set that is compatible with the H8/300 CPU.

  • High-speed H8/300H central processing unit with an internal 16-bit architecture
    • Upward-compatible with H8/300 CPU on an object level
    • Sixteen 16-bit general registers
    • 62 basic instructions
  • Various peripheral functions
    • Timer A (can be used as a time base for a clock)
    • Timer V (8-bit timer)
    • Timer W (16-bit timer)
    • Watchdog timer
    • SCI3 (Asynchronous or clocked synchronous serial communication interface)
    • I2C Bus Interface
    • 10-bit A/D converter
  • On-chip memory

Характеристики

Schedule_b

8542310000

Number_of_timers

3

Operating_temperature

-40 to 85 °C

Pin_count

64

Product_dimensions

10 x 10 x 1.45 mm

Program_memory_size

32 Kb

Ram_size

2 KB

On_chip_adc

8-chx10-bit

Specifications

http://documentation.renesas.com/eng/products/mpumcu/rej09b0142_h83664.pdf

Supplier_package

LQFP

Watchdog

1

Max_speed

16 MHz

Operating_supply_voltage

5 V

Instruction_set_architecture

CISC

Бренд

Country_of_origin

United States

Data_bus_width

16, 32 Bit

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

I2C/SCI

Number_of_programmable_i_os

29

Lead_finish

Tin/Lead

Max_expanded_memory_size

64 KB

Max_operating_supply_voltage

5.5 V

Min_operating_supply_voltage

4 V

Mounting

Surface Mount

SKU: HD64F3664FPJ

Description

The H8/3664 Group are single-chip microcomputers made up of the high-speed H8/300H CPU employing Renesas Technology original architecture as their cores, and the peripheral functions required to configure a system. The H8/300H CPU has an instruction set that is compatible with the H8/300 CPU.

  • High-speed H8/300H central processing unit with an internal 16-bit architecture
    • Upward-compatible with H8/300 CPU on an object level
    • Sixteen 16-bit general registers
    • 62 basic instructions
  • Various peripheral functions
    • Timer A (can be used as a time base for a clock)
    • Timer V (8-bit timer)
    • Timer W (16-bit timer)
    • Watchdog timer
    • SCI3 (Asynchronous or clocked synchronous serial communication interface)
    • I2C Bus Interface
    • 10-bit A/D converter
  • On-chip memory

Additional information

Schedule_b

8542310000

Number_of_timers

3

Operating_temperature

-40 to 85 °C

Pin_count

64

Product_dimensions

10 x 10 x 1.45 mm

Program_memory_size

32 Kb

Ram_size

2 KB

On_chip_adc

8-chx10-bit

Specifications

http://documentation.renesas.com/eng/products/mpumcu/rej09b0142_h83664.pdf

Supplier_package

LQFP

Watchdog

1

Max_speed

16 MHz

Operating_supply_voltage

5 V

Instruction_set_architecture

CISC

Бренд

Country_of_origin

United States

Data_bus_width

16, 32 Bit

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

I2C/SCI

Number_of_programmable_i_os

29

Lead_finish

Tin/Lead

Max_expanded_memory_size

64 KB

Max_operating_supply_voltage

5.5 V

Min_operating_supply_voltage

4 V

Mounting

Surface Mount