Description
The H8/3062 Group is a series of microcontrollers (MCUs) that integrate system supporting functions together with an H8/300H CPU core having an original Renesas architecture.The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address space. Its instruction set is upward-compatible at the object-code level with the H8/300 CPU, enabling easy porting of software from the H8/300 Series.The on-chip system supporting functions include ROM, RAM, a 16-bit timer, an 8-bit timer, a programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial communication interface (SCI), an A/D converter, a D/A converter, I/O ports, and other facilities. The 11 members of the H8/3062 Group are the H8/3062F-ZTAT R-mask version, H8/3062 (masked ROM version), H8/3061 (masked ROM version), H8/3060 (masked ROM version), H8/3064F-ZTAT B-mask version, H8/3062F-ZTAT B-mask version, H8/3064 masked ROM Bmask version, H8/3062 masked ROM B-mask version, H8/3061 masked ROM B-mask version, and H8/3060 masked ROM B-mask version.Seven MCU operating modes offer a choice of bus width and address space size. The modes (modes 1 to 7) include two single-chip modes and five expanded modes.
- 8-bit up-counter (external event count capability)
- Two time constant registers
- Two channels can be connected
- Maximum 16-bit pulse output, using 16-bit timer as time base
- Up to four 4-bit pulse output groups (or one 16-bit group, or two 8-bit groups)
- Non-overlap mode available
- Internal reset signal can be generated by overflow
- Reset signal can be output externally
- Usable as an interval timer
- Selection of asynchronous or synchronous mode
- Full duplex: can transmit and receive simultaneously
- On-chip baud-rate generator
- Smart card interface extended functions added
- Resolution: 10 bits
- Eight channels, with selection of single or scan mode
- Variable analog conversion voltage range
- Sample-and-hold function
- A/D conversion can be started by an external trigger or 8-bit timer compare match
- Resolution: 8 bits
- Two channels
- D/A outputs can be sustained in software standby mode
- 70 input/output pins
- 9 input-only pins
