Framer E1/J1/T1 1.8V/3.3V 640-Pin BGA

The IDT82P2821 is a 21+1 channels high-density T1/E1/J1 shorthaul Line Interface Unit. Each channel of the IDT82P2821 can be independently configured. The configuration is performed through a Serial orParallel Intel/Motorola Non-Multiplexed /Multiplexed microprocessorinterface. In the receive path, through a Single Ended or Differential line interface,the received signal is processed by an adaptive Equalizer and thensent to a Slicer. Clock and data are recovered from the digital pulsesoutput from the Slicer. After passing through an enabled or disabledReceive Jitter Attenuator, the recovered data is decoded using B8ZS/AMI/HDB3 line code rule in Single Rail NRZ Format mode and output tothe system, or output to the system without decoding in Dual Rail NRZFormat mode and Dual Rail RZ Format mode. In the transmit path, the data to be transmitted is input on TDn inSingle Rail NRZ Format mode or TDPn/TDNn in Dual Rail NRZ Format mode and Dual Rail RZ Format mode, and is sampled by a transmit reference clock. The clock can be supplied externally from TCLKn or recovered from the input transmit data by an internal Clock Recovery. A selectable JA in Tx path is used to de-jitter gapped clocks. To meet T1/E1/J1 waveform standards, five preset T1 templates and two E1 templates, as well as an arbitrary waveform generator are provided. The data through the Waveform Shaper, the Line Driver and the Tx Transmitteris output on TTIPn and TRINGn. Alarms (including LOS, AIS) and defects (including BPV, EXZ) aredetected in both receive line side and transmit system side. AIS alarm,PRBS, ARB and IB patterns can be generated /detected in receive /transmit direction for testing purpose. Analog Loopback, Digital Loopback and Remote Loopback are all integrated for diagnostics. Channel 0 is a special channel. Besides normal operation as theother 21 channels, channel 0 also supports G.772 Monitoring and JitterMeasurement per ITU O.171. A line monitor function per T1.102 is available to provide a Non-IntrusiveMonitoring of channels of other devices. JTAG per IEEE 1149.1 is also supported by the IDT82P2821.

• Supports various line interface options
• Provides T1/E1/J1 short haul waveform templates and userprogrammable arbitrary waveform templates
• Provides two JAs (Jitter Attenuator) for each channel of receiver and transmitter
• Supports AMI/B8ZS (for T1/J1) and AMI/HDB3 (for E1) encoding and decoding
• Per-channel System Interface options and diagnostic functions
• Channel 0 can be configured as monitoring channel or regular channel to increase capacity
• Flexible master clock
• Two selectable reference clock outputs
• IEEE1149.1 JTAG boundary scan
• Two general purpose I/O pins
• 3.3 V I/O with 5 V tolerant inputs
• 3.3 V and 1.8 V power supply
• Package: 640-pin TEPBGA (31 mm X 31 mm)