Framer E1/J1/T1 1.8V/3.3V 416-Pin BGA

The IDT82P2816 is a 16+1 channels high-density T1/E1/J1 short haul Line Interface Unit. Each channel of the IDT82P2816 can be independently configured. The configuration is performed through a Serial or Parallel Intel/Motorola Non-Multiplexed /Multiplexed microprocessor interface. In the receive path, through a Single Ended or Differential line interface, the received signal is processed by an adaptive Equalizer and then sent to a Slicer. Clock and data are recovered from the digital pulses output from the Slicer. After passing through an enabled or disabled Receive Jitter Attenuator, the recovered data is decoded using B8ZS/ AMI/HDB3 line code rule in Single Rail NRZ Format mode and output to the system, or output to the system without decoding in Dual Rail NRZ Format mode and Dual Rail RZ Format mode. In the transmit path, the data to be transmitted is input on TDn in Single Rail NRZ Format mode or TDPn/TDNn in Dual Rail NRZ Format mode and Dual Rail RZ Format mode, and is sampled by a transmit reference clock. The clock can be supplied externally from TCLKn or recovered from the input transmit data by an internal Clock Recovery. A selectable JA in Tx path is used to de-jitter gapped clocks. To meet T1/ E1/J1 waveform standards, five preset T1 templates and two E1 templates, as well as an arbitrary waveform generator are provided. The data through the Waveform Shaper, the Line Driver and the Tx Transmitter is output on TTIPn and TRINGn. Alarms (including LOS, AIS) and defects (including BPV, EXZ) are detected in both receive line side and transmit system side. AIS alarm, PRBS, ARB and IB patterns can be generated /detected in receive / transmit direction for testing purpose. Analog Loopback, Digital Loopback and Remote Loopback are all integrated for diagnostics. Channel 0 is a special channel. Besides normal operation as the other 16 channels, channel 0 also supports G.772 Monitoring and Jitter Measurement per ITU O.171. A line monitor function per T1.102 is available to provide a Non-Intrusive Monitoring of channels of other devices. JTAG per IEEE 1149.1 is also supported by the IDT82P2816.

• Integrates 16+1 channels T1/E1/J1 short haul line interface units for 100 ? T1, 120 ? E1, 110 ? J1 twisted pair cable and 75 ? E1 coaxial cable applications
• Per-channel configurable Line Interface options
  • Supports various line interface options
  • Supports global configuration and per-channel configuration to T1, E1 or J1 mode
• Per-channel programmable features
  • Provides T1/E1/J1 short haul waveform templates and userprogrammable arbitrary waveform templates
• Supports AMI/B8ZS (for T1/J1) and AMI/HDB3 (for E1) encoding and decoding
• Per-channel System Interface
  • Supports Single Rail, Dual Rail with clock or without clock and sliced system interface
• Per-channel system and diagnostic functions
  • Provides transmit driver over-current detection and protection with optional automatic high impedance of transmit interface
  • Provides defect and alarm detection in both receive and transmit directions.
• Channel 0 monitoring
• Hitless Protection Switching (HPS) without external Relays
• Clock Inputs and Outputs
  • Flexible master clock (N x 1.544 MHz or N x 2.048 MHz) (1 = N = 8, N is an integer number)
  • Cascading is provided to select a single reference clock from multiple devices without the need for any external logic
• Microprocessor Interface
• 3.3 V I/O with 5 V tolerant inputs
• Package: 416-pin PBGA (27 mm X 27 mm)