Audio Codec 4ADC / 4DAC 64-Pin MQFP

The Signal Processing Codec Filter for terminal applications PSB 2134 SICOFI4-TE is a special derivative of the programmable codec-filter-IC family designed for terminal applications featuring four POTS interfaces. It can be directly connected to the IOM-2 interface in terminal mode running at 1.536 MHz clock rate. PCM data is transferred using the bit clock signal at 768 kHz. Programming of internal registers is done via the serial microcontroller interface. Only two external capacitors per channel are needed to complete the functionality of the PSB 2134. The internal level accuracy is based on a very accurate bandgap reference. The frequency behavior is mainly determined by digital filters, which do not have any fluctuations. As a result of the new ADC- and DAC- concepts linearity is only limited by second order parasitic effects. Although the device works only from one single 5 V supply there is a very good dynamic range available. The PSB 2134 is a DSP based codec which allows the integration of filters and tone generators besides the regular A- or u-law conversion. In addition it integrates I/O extensions to the microcontroller and provides the necessary I/O pins to control the SLIC or discrete SLIC replacement. Interrupts are generated to the microcontroller if changes (e.g. Off-Hook detection) have been occurred. The PSB 2134 provides a ring frequency output pin. This pin has a programmable clock frequency to meet the European and US ringing frequency requirements using only one external divider. The IOM-2 data lines DU and DD can both be used for transmitting or receiving voice data. The position of each receive and transmit timeslot is programmable. Internal communication between analog ports is supported by programming each channel to the same timeslot but reversing the data lines. Thus the transmitted PCM data is transmitted by one port and received by the second port via the same timeslot. An additional IC for switch matrix is eliminated. Single chip programmable CODEC and FILTER to handle two or four POTS interfaces IOM-2 compatible interface (1.536 MHz DCL, 768 kHz Bit clock) Internal communication between POTS interfaces Programmable I/O lines for signaling information per channel Programmable ring generator output Two programmable tone generators per channel Serial microcontroller interface Digital signal processing technique High analog driving capability (300 ?) for direct driving of transformers Programmable digital filters to adapt the transmission behavior especially for AC impedance matching transhybrid balancing frequency response gain A/µ-law conversion Single 5 V power supply Low power 0.9 µm analog CMOS technology Advanced test capabilities P-MQFP-64 package