Analog Switches and Level-translating Buffers 28-Pin TQFN EP T/R, MAX4885AEETI+T, Maxim Integrated

The MAX4885 integrates high-bandwidth analog switches and level translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC), and horizontal and vertical synchronization (HSYNC, VSYNC) signals. A low-noise charge pump with internal capacitors provides a boosted gate-drive voltage to improve performance of the RGB switches. In the 1:2 multiplexer mode, HSYNC/VSYNC inputs feature level-shifting buffers to support low voltage CMOS or standard TTL-compatible graphics controllers. In the 2:1 multiplexer mode, the output buffers for the HSYNC/VSYNC inputs are disabled, allowing bidirectional signaling. In both modes, DDC signals are voltage-clamped to an external voltage to provide level translation and protection. The MAX4885 features a 5µA shutdown mode and is ESD protected to ±8kV human body model (HBM) on externally routed pins. The MAX4885 is specified over the extended (-40°C to +85°C) temperature range, and is available in the 32-pin, 5mm x 5mm TQFN package.

  • +5V Single-Supply Operation
  • Programmable Voltage Clamp for Open-Drain DDC Signals
  • Low 5O (typ) On-Resistance (R, G, B Signals)
  • Low 13pF (typ) On-Capacitance (R, G, B Signals)
  • Break-Before-Make Switching Protects Against Circuit Shorts
  • Low 300µA Supply Current (Lower than 1µA with Charge Pump Disabled)
  • Space-Saving, Lead-Free 32-Pin (5mm x 5mm) TQFN Package

Характеристики

Бренд

Screening_level

Extended

Operating_temp

-40 to 85 °C

Pin_count

28

Product_dimensions

4 x 4 x 0.73 mm

Schedule_b

8542390000

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/MAXM/MAXMS10021/MAXMS10021-1.pdf?hkey=52A5661711E402568146F3353EA87419

Supplier_package

TQFN EP

Eccn

EAR99

Htsn

8542390001

Lead_finish

Matte Tin

Max_processing_temp

260, 300

Mounting

Surface Mount

Msl_level

1

Артикул: MAX4885AEETI+T

Описание

The MAX4885 integrates high-bandwidth analog switches and level translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC), and horizontal and vertical synchronization (HSYNC, VSYNC) signals. A low-noise charge pump with internal capacitors provides a boosted gate-drive voltage to improve performance of the RGB switches. In the 1:2 multiplexer mode, HSYNC/VSYNC inputs feature level-shifting buffers to support low voltage CMOS or standard TTL-compatible graphics controllers. In the 2:1 multiplexer mode, the output buffers for the HSYNC/VSYNC inputs are disabled, allowing bidirectional signaling. In both modes, DDC signals are voltage-clamped to an external voltage to provide level translation and protection. The MAX4885 features a 5µA shutdown mode and is ESD protected to ±8kV human body model (HBM) on externally routed pins. The MAX4885 is specified over the extended (-40°C to +85°C) temperature range, and is available in the 32-pin, 5mm x 5mm TQFN package.

  • +5V Single-Supply Operation
  • Programmable Voltage Clamp for Open-Drain DDC Signals
  • Low 5O (typ) On-Resistance (R, G, B Signals)
  • Low 13pF (typ) On-Capacitance (R, G, B Signals)
  • Break-Before-Make Switching Protects Against Circuit Shorts
  • Low 300µA Supply Current (Lower than 1µA with Charge Pump Disabled)
  • Space-Saving, Lead-Free 32-Pin (5mm x 5mm) TQFN Package

Детали

Бренд

Screening_level

Extended

Operating_temp

-40 to 85 °C

Pin_count

28

Product_dimensions

4 x 4 x 0.73 mm

Schedule_b

8542390000

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/MAXM/MAXMS10021/MAXMS10021-1.pdf?hkey=52A5661711E402568146F3353EA87419

Supplier_package

TQFN EP

Eccn

EAR99

Htsn

8542390001

Lead_finish

Matte Tin

Max_processing_temp

260, 300

Mounting

Surface Mount

Msl_level

1