ADC Single Pipelined 200Msps 12-bit Parallel/Serial/LVDS 48-Pin VQFN EP T/R, ADS4128IRGZT, Texas Instruments

The ADS4128 is a 12-bit analog-to-digital converter (ADC) with sampling rates up to 200 MSPS. This device uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8-V supply. The device is well-suited for multi-carrier, wide-bandwidth communications applications. The ADS4128 has fine-gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. It includes a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled-down power with no loss in performance. The ADS4128 is available in a compact QFN-48 package and is specified over the industrial temperature range (–40°C to +85°C) 

  • Maximum Sample Rate: 200 MSPS
  • Ultralow Power with 1.8-V Single Supply:
    • 230-mW Total Power at 200 MSPS
  • High Dynamic Performance:
    • SNR: 69 dBFS at 170 MHz
    • SFDR: 85 dBc at 170 MHz
  • Dynamic Power Scaling with Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-O Termination
      • 2x Strength: 50-O Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6 dB for SNR and SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down To 200 mVPP
  • Package: 7-mm × 7-mm QFN-48
  • Характеристики

    Volt_supply_source

    Analog and Digital

    Number_of_analog_inputs

    1

    Sampling_rate

    200 Msps

    Digital_supply_support

    Yes

    Architecture

    Pipelined

    Resolution

    12 Bit

    Differential_nonlinearity

    -0.95, 1.6 LSB

    Signal_to_noise_ratio

    70 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    3A991.C.2

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    48

    Product_dimensions

    7 x 7 x 0.9 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS4128&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    1.7, 1.8 V, 1.9

    Number_of_adcs

    1

    Digital_interface_type

    LVDS, Parallel, Serial

    SKU: ADS4128IRGZT

    Description

    The ADS4128 is a 12-bit analog-to-digital converter (ADC) with sampling rates up to 200 MSPS. This device uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8-V supply. The device is well-suited for multi-carrier, wide-bandwidth communications applications. The ADS4128 has fine-gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. It includes a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled-down power with no loss in performance. The ADS4128 is available in a compact QFN-48 package and is specified over the industrial temperature range (–40°C to +85°C) 

  • Maximum Sample Rate: 200 MSPS
  • Ultralow Power with 1.8-V Single Supply:
    • 230-mW Total Power at 200 MSPS
  • High Dynamic Performance:
    • SNR: 69 dBFS at 170 MHz
    • SFDR: 85 dBc at 170 MHz
  • Dynamic Power Scaling with Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-O Termination
      • 2x Strength: 50-O Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6 dB for SNR and SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down To 200 mVPP
  • Package: 7-mm × 7-mm QFN-48
  • Additional information

    Volt_supply_source

    Analog and Digital

    Number_of_analog_inputs

    1

    Sampling_rate

    200 Msps

    Digital_supply_support

    Yes

    Architecture

    Pipelined

    Resolution

    12 Bit

    Differential_nonlinearity

    -0.95, 1.6 LSB

    Signal_to_noise_ratio

    70 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    3A991.C.2

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    48

    Product_dimensions

    7 x 7 x 0.9 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS4128&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    1.7, 1.8 V, 1.9

    Number_of_adcs

    1

    Digital_interface_type

    LVDS, Parallel, Serial