ADC Quad Pipelined 65Msps 14-bit Serial (1-Wire, 2-Wire)/LVDS 64-Pin VQFN EP T/R, ADS6442IRGCT, Texas Instruments

The ADS6445/ADS6444/ADS6443/ADS6442 (ADS644X) is a family of high performance 14-bit 125/105/80/65 MSPS quad channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1dB steps up to 6dB. The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies. An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14-bit data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs. The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye-openings and improve signal integrity, easing capture by the receiver. The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary. The ADS644X has internal references, but can also support an external reference mode. The device is specified over the industrial temperature range (–40°C to 85°C).

  • Maximum Sample Rate: 125 MSPS
  • 14-Bit Resolution with No Missing Codes
  • Simultaneous Sample and Hold
  • 3.5dB Coarse Gain and up to 6dB Programmable Fine Gain for SFDR/SNR Trade-Off
  • Serialized LVDS Outputs with Programmable Internal Termination Option
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude down to 400 mVPP
  • Internal Reference with External Reference Support
  • No External Decoupling Required for References
  • 3.3-V Analog and Digital Supply
  • 64 QFN Package (9 mm × 9 mm)
  • Pin Compatible 12-Bit Family (ADS642X – SLAS532A)
  • Feature Compatible Dual Channel Family (ADS624X – SLAS542A, ADS644X – SLAS543A)
  • APPLICATIONS
    • Base-Station IF Receivers
    • Diversity Receivers
    • Medical Imaging
    • Test Equipment
  • Характеристики

    Volt_supply_source

    Single

    Number_of_analog_inputs

    4

    Sampling_rate

    65 Msps

    Volt_reference

    External, Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    14 Bit

    Typical_power_dissipation

    1050 mW

    Differential_nonlinearity

    -0.9, 1.8 LSB

    Signal_to_noise_ratio

    74.5 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    Malaysia

    Eccn

    3A991.C.3

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_power_dissipation

    1200 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    64

    Product_dimensions

    9 x 9 x 0.88 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS6442&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    3, 3.3 V, 3.6

    Number_of_adcs

    4

    Digital_interface_type

    LVDS, Serial (1-Wire, 2-Wire)

    Артикул: ADS6442IRGCT

    Описание

    The ADS6445/ADS6444/ADS6443/ADS6442 (ADS644X) is a family of high performance 14-bit 125/105/80/65 MSPS quad channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1dB steps up to 6dB. The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies. An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14-bit data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs. The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye-openings and improve signal integrity, easing capture by the receiver. The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary. The ADS644X has internal references, but can also support an external reference mode. The device is specified over the industrial temperature range (–40°C to 85°C).

  • Maximum Sample Rate: 125 MSPS
  • 14-Bit Resolution with No Missing Codes
  • Simultaneous Sample and Hold
  • 3.5dB Coarse Gain and up to 6dB Programmable Fine Gain for SFDR/SNR Trade-Off
  • Serialized LVDS Outputs with Programmable Internal Termination Option
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude down to 400 mVPP
  • Internal Reference with External Reference Support
  • No External Decoupling Required for References
  • 3.3-V Analog and Digital Supply
  • 64 QFN Package (9 mm × 9 mm)
  • Pin Compatible 12-Bit Family (ADS642X – SLAS532A)
  • Feature Compatible Dual Channel Family (ADS624X – SLAS542A, ADS644X – SLAS543A)
  • APPLICATIONS
    • Base-Station IF Receivers
    • Diversity Receivers
    • Medical Imaging
    • Test Equipment
  • Детали

    Volt_supply_source

    Single

    Number_of_analog_inputs

    4

    Sampling_rate

    65 Msps

    Volt_reference

    External, Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    14 Bit

    Typical_power_dissipation

    1050 mW

    Differential_nonlinearity

    -0.9, 1.8 LSB

    Signal_to_noise_ratio

    74.5 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    Malaysia

    Eccn

    3A991.C.3

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_power_dissipation

    1200 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    64

    Product_dimensions

    9 x 9 x 0.88 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS6442&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    3, 3.3 V, 3.6

    Number_of_adcs

    4

    Digital_interface_type

    LVDS, Serial (1-Wire, 2-Wire)