ADC Pipelined 1-CH 200Msps 14-bit Parallel CMOS/Serial DDR LVDS 124-Pin VTLA T/R, MCP37220T-200I/TL, Microchip

Описание

The MCP37220-200 is a single-channel 200 Msps 14-bit pipelined ADC, with built-in high-order digital decimation filters, gain and offset adjustment.These devices feature harmonic distortion correction and DAC noise cancellation that enables high-performance specifications with SNR of 67.8 dBFS (typical) and SFDR of 96 dBc (typical).The output decimation filter option improves SNR performance up to 83.9 dBFS with the 512x decimation setting.The digital down-conversion option in the MCP37D20-200 can be utilized with the decimation and quadrature output (I and Q data) options and offers great flexibility in digital communication system design, including cellular base-stations and narrow-band communication systems. These A/D converters exhibit industry-leading low-power performance with only 348 mW operation while using the LVDS output interface at 200 Msps. This superior low-power operation, coupled with high dynamic performance, makes these devices ideal for portable communication devices, sonar, radar and high-speed data acquisition systems.

• Sample Rates: 200 Msps
• Signal-to-Noise Ratio (SNR) with fIN = 15 MHz and -1 dBFS:
  • 67.8 dBFS (typical) at 200 Msps
• Spurious-Free Dynamic Range (SFDR) with fIN = 15 MHz and -1 dBFS:
  • 96 dBc (typical) at 200 Msps
• Power Dissipation with LVDS Digital I/O:
  • 348 mW at 200 Msps
• Power Dissipation with CMOS Digital I/O:
  • 306 mW at 200 Msps, output clock = 100 MHz
• Power Dissipation Excluding Digital I/O:
  • 257 mW at 200 Msps
• Power-Saving Modes:
  • 80 mW during Standby
  • 33 mW during Shutdown
• Supply Voltage:
  • Digital Section: 1.2V, 1.8V
  • Analog Section: 1.2V, 1.8V
• Selectable Full-Scale Input Range: up to 1.8 VP-P
• Analog Input Bandwidth: 650 MHz
• Output Interface:
  • Parallel CMOS, DDR LVDS
• Output Data Format:
  • Two"s complement or offset binary
• Optional Output Data Randomizer
• Digital Signal Post-Processing (DSPP) Options:
  • Decimation filters for improved SNR
  • Offset and Gain adjustment
  • Digital Down-Conversion (DDC) with I/Q or fS/8 output (MCP37D20-200)
• Built-In ADC Linearity Calibration Algorithms:
  • Harmonic Distortion Correction (HDC)
  • DAC Noise Cancellation (DNC)
  • Dynamic Element Matching (DEM)
  • Flash Error Calibration
• Serial Peripheral Interface (SPI)
• Package Options:
  • VTLA-124 (9 mm x 9 mm x 0.9 mm)
  • TFBGA-121 (8 mm x 8 mm x 1.08 mm)
• No external reference decoupling capacitor required for TFBGA Package
• Industrial Temperature Range: -40°C to +85°C
• Tape and Reel Packaging