ADC Dual Pipelined 65Msps 12-bit Parallel/Serial/LVDS 64-Pin VQFN EP T/R, ADS62P22IRGCR, Texas Instruments

ADS62P2X is a dual channel 12-bit A/D converter family with maximum sample rates up to 125 MSPS. It combines high performance and low power consumption in a compact 64 QFN package. Using an internal sample and hold and low jitter clock buffer, the ADC supports high SNR and high SFDR at high input frequencies. It has coarse and fine gain options that can be used to improve SFDR performance at lower full-scale input ranges.ADS62P2X includes a digital processing block that consists of several useful and commonly used digital functions such as ADC offset correction, fine gain correction (in steps of 0.05 dB), decimation by 2,4,8 and in-built and custom programmable filters. By default, the digital processing block is bypassed, and its functions are disabled.Two output interface options exist – parallel CMOS and DDR LVDS (Double Data Rate). ADS62P2X includes internal references while traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to 85°C).

  • Maximum Sample Rate: 125 MSPS
  • 12-Bit Resolution with No Missing Codes
  • 95 dB Crosstalk
  • Parallel CMOS and DDR LVDS Output Options
  • 3.5 dB Coarse Gain and Programmable Fine Gain
    up to 6 dB for SNR/SFDR Trade-Off
  • Digital Processing Block with:
    • Offset Correction
    • Fine Gain Correction, in Steps of 0.05 dB
    • Decimation by 2/4/8
    • Built-in and Custom Programmable
      24-Tap Low-/High-/Band-Pass Filters
  • Supports Sine, LVPECL, LVDS, and LVCMOS Clocks and
    Amplitude Down to 400 mVPP
  • Clock Duty Cycle Stabilizer
  • Internal Reference; Supports External Reference also
  • 64-QFN Package (9mm × 9mm)
  • Pin Compatible 14-Bit Family (ADS62P4X)
  • Характеристики

    Volt_supply_source

    Single

    Number_of_analog_inputs

    2

    Sampling_rate

    65 Msps

    Volt_reference

    External, Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    12 Bit

    Typical_power_dissipation

    515 mW

    Differential_nonlinearity

    0.3 LSB

    Signal_to_noise_ratio

    71.6 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    EAR99

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_power_dissipation

    578 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    64

    Product_dimensions

    9 x 9 x 0.88 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS62P25&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    3, 3.3 V, 3.6

    Number_of_adcs

    2

    Digital_interface_type

    LVDS, Parallel, Serial

    Артикул: ADS62P22IRGCR

    Описание

    ADS62P2X is a dual channel 12-bit A/D converter family with maximum sample rates up to 125 MSPS. It combines high performance and low power consumption in a compact 64 QFN package. Using an internal sample and hold and low jitter clock buffer, the ADC supports high SNR and high SFDR at high input frequencies. It has coarse and fine gain options that can be used to improve SFDR performance at lower full-scale input ranges.ADS62P2X includes a digital processing block that consists of several useful and commonly used digital functions such as ADC offset correction, fine gain correction (in steps of 0.05 dB), decimation by 2,4,8 and in-built and custom programmable filters. By default, the digital processing block is bypassed, and its functions are disabled.Two output interface options exist – parallel CMOS and DDR LVDS (Double Data Rate). ADS62P2X includes internal references while traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to 85°C).

  • Maximum Sample Rate: 125 MSPS
  • 12-Bit Resolution with No Missing Codes
  • 95 dB Crosstalk
  • Parallel CMOS and DDR LVDS Output Options
  • 3.5 dB Coarse Gain and Programmable Fine Gain
    up to 6 dB for SNR/SFDR Trade-Off
  • Digital Processing Block with:
    • Offset Correction
    • Fine Gain Correction, in Steps of 0.05 dB
    • Decimation by 2/4/8
    • Built-in and Custom Programmable
      24-Tap Low-/High-/Band-Pass Filters
  • Supports Sine, LVPECL, LVDS, and LVCMOS Clocks and
    Amplitude Down to 400 mVPP
  • Clock Duty Cycle Stabilizer
  • Internal Reference; Supports External Reference also
  • 64-QFN Package (9mm × 9mm)
  • Pin Compatible 14-Bit Family (ADS62P4X)
  • Детали

    Volt_supply_source

    Single

    Number_of_analog_inputs

    2

    Sampling_rate

    65 Msps

    Volt_reference

    External, Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    12 Bit

    Typical_power_dissipation

    515 mW

    Differential_nonlinearity

    0.3 LSB

    Signal_to_noise_ratio

    71.6 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    EAR99

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_power_dissipation

    578 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    64

    Product_dimensions

    9 x 9 x 0.88 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS62P25&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    3, 3.3 V, 3.6

    Number_of_adcs

    2

    Digital_interface_type

    LVDS, Parallel, Serial