ADC Dual Pipelined 65Msps 12-bit Parallel/Serial/LVDS 64-Pin VQFN EP T/R, ADS4222IRGCT, Texas Instruments

The ADS424x/422x are low-speed variants of the ADS42xx ultralow-power family of dual-channel, 14-bit/12-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8V supply. This topology makes the ADS424x/422x well-suited for multi-carrier, wide-bandwidth communications applications. The ADS424x/422x have gain options that can be used to improve SFDR performance at lower full-scale input ranges. These devices include a dc offset correction loop that can be used to cancel the ADC offset. Both DDR (double data rate) LVDS and parallel CMOS digital output interfaces are available in a compact QFN-64 PowerPAD package. The devices include internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. All devices are specified over the industrial temperature range (–40°C to +85°C). 

  • Ultralow Power with Single 1.8V Supply,
    CMOS Output:
    • 183mW total power at65MSPS
    • 277mW total power at 125MSPS
    • 332mW total power at 160MSPS
  • High Dynamic Performance:
    • 88dBc SFDR at 170MHz
    • 71.4dBFS SNR at 170MHz
  • Crosstalk: > 90dB at 185MHz
  • Programmable Gain up to 6dB for
    SNR/SFDR Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8V parallel CMOS interface
    • Double data rate (DDR) LVDS with programmable swing:
      • Standard swing: 350mV
      • Low swing: 200mV
  • Supports Low Input Clock Amplitude
    Down to 200mVPP
  • Package: QFN-64 (9mm × 9mm)
  • Характеристики

    Volt_supply_source

    Single

    Number_of_analog_inputs

    2

    Sampling_rate

    65 Msps

    Volt_reference

    Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    12 Bit

    Typical_power_dissipation

    173 mW

    Differential_nonlinearity

    -0.8, 1.2 LSB

    Signal_to_noise_ratio

    70.9 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    EAR99

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_power_dissipation

    211 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    64

    Product_dimensions

    9 x 9 x 0.88 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS4246&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    1.7, 1.8 V, 1.9

    Number_of_adcs

    2

    Digital_interface_type

    LVDS, Parallel, Serial

    Артикул: ADS4222IRGCT

    Описание

    The ADS424x/422x are low-speed variants of the ADS42xx ultralow-power family of dual-channel, 14-bit/12-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8V supply. This topology makes the ADS424x/422x well-suited for multi-carrier, wide-bandwidth communications applications. The ADS424x/422x have gain options that can be used to improve SFDR performance at lower full-scale input ranges. These devices include a dc offset correction loop that can be used to cancel the ADC offset. Both DDR (double data rate) LVDS and parallel CMOS digital output interfaces are available in a compact QFN-64 PowerPAD package. The devices include internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. All devices are specified over the industrial temperature range (–40°C to +85°C). 

  • Ultralow Power with Single 1.8V Supply,
    CMOS Output:
    • 183mW total power at65MSPS
    • 277mW total power at 125MSPS
    • 332mW total power at 160MSPS
  • High Dynamic Performance:
    • 88dBc SFDR at 170MHz
    • 71.4dBFS SNR at 170MHz
  • Crosstalk: > 90dB at 185MHz
  • Programmable Gain up to 6dB for
    SNR/SFDR Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8V parallel CMOS interface
    • Double data rate (DDR) LVDS with programmable swing:
      • Standard swing: 350mV
      • Low swing: 200mV
  • Supports Low Input Clock Amplitude
    Down to 200mVPP
  • Package: QFN-64 (9mm × 9mm)
  • Детали

    Volt_supply_source

    Single

    Number_of_analog_inputs

    2

    Sampling_rate

    65 Msps

    Volt_reference

    Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    12 Bit

    Typical_power_dissipation

    173 mW

    Differential_nonlinearity

    -0.8, 1.2 LSB

    Signal_to_noise_ratio

    70.9 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    EAR99

    Htsn

    8542390001

    Lead_finish

    Gold

    Max_power_dissipation

    211 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    64

    Product_dimensions

    9 x 9 x 0.88 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADS4246&&fileType=pdf

    Supplier_package

    VQFN EP

    Operating_supply_volt

    1.7, 1.8 V, 1.9

    Number_of_adcs

    2

    Digital_interface_type

    LVDS, Parallel, Serial