ADC Dual Pipelined 105Msps 12-bit Parallel 60-Pin LLP EP T/R, ADC12DC105CISQE/NOPB, Texas Instruments

The ADC12DC105 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). These converters use a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC12DC080/105 may be operated from a single +3.0V or +3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs provide a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12DC105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2"s complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.The ADC12DC105 is available in a 60-lead WQFN package and operates over the industrial temperature range of -40°C to +85°C. 

  • Internal Sample-and-Hold Circuit and Precision Reference
  • Low Power Consumption
  • Clock Duty Cycle Stabilizer
  • Single +3.0V or +3.3V Supply Operation
  • Power-Down Mode
  • Offset Binary or 2"s Complement Output Data Format
  • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)
  • High IF Sampling Receivers
  • Wireless Base Station Receivers
  • Test and Measurement Equipment
  • Communications Instrumentation
  • Portable Instrumentation
  • Характеристики

    Volt_supply_source

    Single

    Number_of_analog_inputs

    2

    Sampling_rate

    105 Msps

    Volt_reference

    External, Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    12 Bit

    Differential_nonlinearity

    0.55 LSB

    Signal_to_noise_ratio

    71 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    EAR99

    Htsn

    8542390001

    Lead_finish

    Tin

    Max_power_dissipation

    800 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    60

    Product_dimensions

    9 x 9 x 0.8 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADC12DC105&&fileType=pdf

    Supplier_package

    LLP EP

    Operating_supply_volt

    2.7, 3.3 V, 3.6

    Number_of_adcs

    2

    Digital_interface_type

    Parallel

    Артикул: ADC12DC105CISQE/NOPB

    Описание

    The ADC12DC105 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). These converters use a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC12DC080/105 may be operated from a single +3.0V or +3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs provide a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12DC105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2"s complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.The ADC12DC105 is available in a 60-lead WQFN package and operates over the industrial temperature range of -40°C to +85°C. 

  • Internal Sample-and-Hold Circuit and Precision Reference
  • Low Power Consumption
  • Clock Duty Cycle Stabilizer
  • Single +3.0V or +3.3V Supply Operation
  • Power-Down Mode
  • Offset Binary or 2"s Complement Output Data Format
  • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)
  • High IF Sampling Receivers
  • Wireless Base Station Receivers
  • Test and Measurement Equipment
  • Communications Instrumentation
  • Portable Instrumentation
  • Детали

    Volt_supply_source

    Single

    Number_of_analog_inputs

    2

    Sampling_rate

    105 Msps

    Volt_reference

    External, Internal

    Digital_supply_support

    No

    Architecture

    Pipelined

    Resolution

    12 Bit

    Differential_nonlinearity

    0.55 LSB

    Signal_to_noise_ratio

    71 dBFS

    Input_type

    Voltage

    Input_signal_type

    Differential

    Input_volt

    2 Vp-p

    Бренд

    Msl_level

    3

    Country_of_origin

    United States

    Eccn

    EAR99

    Htsn

    8542390001

    Lead_finish

    Tin

    Max_power_dissipation

    800 mW

    Max_processing_temp

    260

    Mounting

    Surface Mount

    Operating_temp

    -40 to 85 °C

    Pin_count

    60

    Product_dimensions

    9 x 9 x 0.8 mm

    Schedule_b

    8542390000

    Screening_level

    Industrial

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ADC12DC105&&fileType=pdf

    Supplier_package

    LLP EP

    Operating_supply_volt

    2.7, 3.3 V, 3.6

    Number_of_adcs

    2

    Digital_interface_type

    Parallel