I/O Controller 128-Pin QFP

The SCH5627P is a 3.3V PC 2001 compliant Super I/O controller with an LPC interface. All legacy drivers used for Super I/O components are supported making this interface transparent to the supporting software. The LPC bus also supports power management, such as wake-up and sleep modes. The SCH5627P provides temperature monitoring with auto fan control. The temperature monitor is capable of monitoring up to three external diodes, one internal ambient temperature sensor or retrieving temperatures from external processors that implement the PECI Interface. This device offers programmable automatic fan control support based on one or more of these measured temperatures. There are four pulse width modulation (PWM) outputs with high frequency support as well as four fan tachometer inputs. In addition, there is support for a bi-directional PROCHOT# pin that may be used to generate an interrupt, adjust the programmed temperature limits in the auto fan control logic, or force the PWM outputs on full. The RRCC feature provides a linear relationship of temperature to fan speed. The Glue Logic includes various power management logic; including generation of RSMRST# and Power OK signal generation. There are also two LEDs to indicate power status. The part also provides a low battery warning circuit. The SCH5627P provides 60 General Purpose I/O control pins, which offer flexibility to the system designer. The SCH5627P incorporates the following Super I/O components: a parallel port that is compatible with IBM PC/AT architecture, as well as the IEEE 1284 EPP and ECP; two serial ports that are 16C550A UART compatible; a keyboard/mouse controller that uses an 8042 micro controller; and a floppy disk controller. The SCH5627P is ACPI 1.0b/2.0 compatible and supports multiple low power-down modes. It incorporates sophisticated power control circuitry (PCC), which includes keyboard and mouse wake-up events. The SCH5627P incorporates a high-performance embedded microcontroller. The SCH5627P communicates with the system host using the Intel® Low Pin Count bus. High Performance Embedded Controller (EC) ACPI 2.0 Compliant PC2001 Compliant LPC Interface 3.3-Volt I/O 128-pin QFP RoHS Compliant Package System Watch Dog Timer (WDT) Two EC-based SMBus 2.0 Host Controllers PECI Interface 2.0 Temperature reading from PCH over SMBus Temperature reading from AMD-TSI over SMBus Bi-directional PROCHOT# Pin PWM (Pulse width Modulation) Outputs (4) Fan tachometer Inputs (4) Internal clock sources Low Battery Warning Programmable Wake-up Event Interface General Purpose Input/Output Pins (60 total) System Management Interrupt (SMI)