MCU 32-Bit LPC11E00 ARM Cortex M0 RISC 128KB Flash 3.3V 64-Pin LQFP Tray, LPC11E37HFBD64/4QL, NXP

The LPC11E3x are an ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures. The LPC11E3x operate at CPU frequencies of up to 50 MHz. The peripheral complement of the LPC11E3x includes up to 128 kB of flash memory, up to 12 kB of SRAM data memory and 4 kB EEPROM, one Fast-mode Plus I2C-bus interface, one RS-485/EIA-485 USART with support for synchronous mode and smart card interface, two SSP interfaces, four general purpose counter/timers, a 10-bit ADC, and up to 54 general purpose I/O pins. The I/O Handler is a software library-supported hardware engine that can be used to add performance, connectivity and flexibility to system designs. It is available on the LPC11E37HFBD64/401. The I/O Handler can emulate serial interfaces such as UART, I 2C, and I2S with no or very low additional CPU load and can off-load the CPU by performing processing-intensive functions like DMA transfers in hardware.

  • System:
    • ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
    • ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
    • Non Maskable Interrupt (NMI) input selectable from several input sources.
    • System tick timer.
  • Memory:
    • Up to 128 kB on-chip flash program memory with sector (4 kB) and page erase (256 byte) access.
    • 4 kB on-chip EEPROM data memory; byte erasable and byte programmable; on-chip API support.
    • 12 kB SRAM data memory.
    • 16 kB boot ROM.
    • In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
    • ROM-based 32-bit integer division routines.
  • Debug options:
    • Standard JTAG (Joint Test Action Group) test interface for BSDL (Boundary Scan Description Language).
    • Serial Wire Debug.

Характеристики

Program_memory_type

Flash

Device_core

ARM Cortex M0

Max_operating_supply_voltage

3.6 V

Max_power_dissipation

1500 mW

Max_processing_temp

260 °C

Max_speed

50 MHz

Mounting

Surface Mount

Msl_level

1

Number_of_programmable_i_os

54

Number_of_timers

4

Min_operating_supply_voltage

1.8 V

On_chip_adc

8-chx10-bit

Бренд

Country_of_origin

Taiwan

Data_bus_width

32 Bit

Data_memory_size

4 Kb

Тип интерфейса

I2C/SPI/SSP/UART/USART

Supplier_package

LQFP

Htsn

8542310001

Instruction_set_architecture

RISC

Eccn

EAR99

Watchdog

1

Operating_supply_voltage

3.3 V

Operating_temperature

-40 to 85 °C

Pin_count

64

Product_dimensions

10 x 10 x 1.4

Program_memory_size

128 KB

Ram_size

12 KB

Schedule_b

8542310000

Screening_level

Industrial

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGL-S-A0000133909/PHGL-S-A0000133909-1.pdf?hkey=52A5661711E402568146F3353EA87419

Lead_finish

Pure Tin

Артикул: LPC11E37HFBD64/4QL

Описание

The LPC11E3x are an ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures. The LPC11E3x operate at CPU frequencies of up to 50 MHz. The peripheral complement of the LPC11E3x includes up to 128 kB of flash memory, up to 12 kB of SRAM data memory and 4 kB EEPROM, one Fast-mode Plus I2C-bus interface, one RS-485/EIA-485 USART with support for synchronous mode and smart card interface, two SSP interfaces, four general purpose counter/timers, a 10-bit ADC, and up to 54 general purpose I/O pins. The I/O Handler is a software library-supported hardware engine that can be used to add performance, connectivity and flexibility to system designs. It is available on the LPC11E37HFBD64/401. The I/O Handler can emulate serial interfaces such as UART, I 2C, and I2S with no or very low additional CPU load and can off-load the CPU by performing processing-intensive functions like DMA transfers in hardware.

  • System:
    • ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
    • ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
    • Non Maskable Interrupt (NMI) input selectable from several input sources.
    • System tick timer.
  • Memory:
    • Up to 128 kB on-chip flash program memory with sector (4 kB) and page erase (256 byte) access.
    • 4 kB on-chip EEPROM data memory; byte erasable and byte programmable; on-chip API support.
    • 12 kB SRAM data memory.
    • 16 kB boot ROM.
    • In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
    • ROM-based 32-bit integer division routines.
  • Debug options:
    • Standard JTAG (Joint Test Action Group) test interface for BSDL (Boundary Scan Description Language).
    • Serial Wire Debug.

Детали

Program_memory_type

Flash

Device_core

ARM Cortex M0

Max_operating_supply_voltage

3.6 V

Max_power_dissipation

1500 mW

Max_processing_temp

260 °C

Max_speed

50 MHz

Mounting

Surface Mount

Msl_level

1

Number_of_programmable_i_os

54

Number_of_timers

4

Min_operating_supply_voltage

1.8 V

On_chip_adc

8-chx10-bit

Бренд

Country_of_origin

Taiwan

Data_bus_width

32 Bit

Data_memory_size

4 Kb

Тип интерфейса

I2C/SPI/SSP/UART/USART

Supplier_package

LQFP

Htsn

8542310001

Instruction_set_architecture

RISC

Eccn

EAR99

Watchdog

1

Operating_supply_voltage

3.3 V

Operating_temperature

-40 to 85 °C

Pin_count

64

Product_dimensions

10 x 10 x 1.4

Program_memory_size

128 KB

Ram_size

12 KB

Schedule_b

8542310000

Screening_level

Industrial

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGL-S-A0000133909/PHGL-S-A0000133909-1.pdf?hkey=52A5661711E402568146F3353EA87419

Lead_finish

Pure Tin