MCU 16-bit/32-bit TMS470 ARM7TDMI RISC 384KB Flash 1.8V 144-Pin LQFP Tray, TMS470R1A384PGEQ, Texas Instruments

The TMS470R1A384(2) devices are members of the Texas Instruments TMS470R1x family of general-purpose 16/32-bit reduced instruction set computer (RISC) microcontrollers. The A384 microcontroller offers high performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit RISC CPU views memory as a linear collection of bytes numbered upwards from zero. The A384 utilizes the big-endian format where the most significant byte of a word is stored at the lowest-numbered byte and the least significant byte at the highest-numbered byte. High-end embedded control applications demand more performance from their controllers while maintaining low costs. The A384 RISC core architecture offers solutions to these performance and cost demands while maintaining low power consumption. The A384 devices contain the following: ARM7TDMI 16/32-bit RISC CPU TMS470R1x system module (SYS) with 470+ enhancements 384K-byte flash 32K-byte SRAM Zero-pin phase-locked loop (ZPLL) clock module Analog watchdog (AWD) timer Enhanced real-time interrupt (RTI) module Interrupt expansion module (IEM) Two serial peripheral interface (SPI) modules Two serial communications interface (SCI) modules Two standard CAN controllers (SCC) Three inter-integrated circuit (I2C) modules Class II serial interface B (C2SIb) module 10-bit multi-buffered analog-to-digital converter (MibADC), with 12 input channels High-end timer (HET) controlling 12 I/Os External clock prescale (ECP) Expansion bus module (EBM) Up to 87 I/O pins and 1 input-only pin (PGE suffix only), up to 51 I/O pins and 1 input-only pin (PZ suffix only) The functions performed by the 470+ system module (SYS) include: Address decoding Memory protection Memory and peripherals bus supervision Reset and abort exception management Prioritization for all internal interrupt sources Device clock control Parallel signature analysis (PSA) The enhanced real-time interrupt (RTI) module on the A384 has the option to be driven by the oscillator clock. This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt priority, and a device memory map. For a more detailed functional description of the SYS module, see the TMS470R1x System Module Reference Guide (literature number SPNU189). The A384 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte, half-word, and word modes. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory implemented with a 32-bit-wide data bus interface. The flash operates with a system clock frequency of up to 24 MHz. When in pipeline mode, the flash operates with a system clock frequency of up to 48 MHz. For more detailed information on the flash, see the Flash section of this data sheet and the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).

  • High-Performance Static CMOS Technology
  • TMS470R1x 16/32-Bit RISC Core (ARM7TDMI™)
    • 24-MHz System Clock (48-MHz Pipeline)
    • Independent 16/32-Bit Instruction Set
    • Open Architecture With Third-Party Support
    • Built-In Debug Module
  • Integrated Memory
    • 384K-Byte Program Flash
      • Three Banks With 18 Contiguous Sectors
    • 32K-Byte Static RAM (SRAM)
  • Operating Features
    • Core Supply Voltage (VCC): 1.71 V to 2.05 V
    • I/O Supply Voltage (VCCIO): 3.0V to 3.6 V
    • Low-Power Modes: STANDBY and HALT
    • Extended Industrial Temperature Range
  • 470+ System Module
    • 32-Bit Address Space Decoding
    • Bus Supervision for Memory/Peripherals
    • Analog Watchdog (AWD) Timer
    • Enhanced Real-Time Interrupt (RTI)
    • Interrupt Expansion Module (IEM)
    • System Integrity and Failure Detection
  • Direct Memory Access (DMA) Controller
    • 32 Control Packets and 16 Channels
  • Zero-Pin Phase-Locked Loop (ZPLL)-Based Clock Module With Prescaler
    • Multiply-by-4 or -8 Internal ZPLL Option
    • ZPLL Bypass Mode
  • Expansion Bus Module (EBM) (PGE Package)
    • Supports 8- and 16-Bit Expansion Bus Memory Interface Mappings
    • 40 I/O Expansion Bus Pins
  • Ten Communication Interfaces:
    • Two Serial Peripheral Interfaces (SPIs)
      • 255 Programmable Baud Rates
    • Two Serial Communication Interfaces (SCIs)
      • 224 Selectable Baud Rates
      • Asynchronous/Isosynchronous Modes
    • Two Standard CAN Controllers (SCC)
      • 16-Mailbox Capacity
      • Fully Compliant With CAN Protocol, Version 2.0B
    • Class II Serial Interface B (C2SIb)
      • Normal 10.4 Kbps and 4X Mode 41.6 Kbps
    • Three Inter-Integrated Circuit (I2C) Modules (See I2C Notes in TMS470R1A384 Silicon Errata, Literature Number SPNZ148)
      • Multi-Master and Slave Interfaces
      • Up to 400 Kbps (Fast Mode)
      • 7- and 10-Bit Address Capability
  • High-End Timer (HET)
    • 12 Programmable I/O Channels:
      • 12 High-Resolution Pins
    • High-Resolution Share Feature (XOR)
    • High-End Timer RAM
      • 64-Instruction Capacity
  • External Clock Prescale (ECP) Module
    • Programmable Low-Frequency External Clock (CLK)
  • 12-Channel 10-Bit Multi-Buffered Analog-to-Digital Converter (MibADC)
    • 32-Word FIFO Buffer
    • Single- or Continuous-Conversion Modes
    • 1.55-µsMinimum Sample/Conversion Time
    • Calibration Mode and Self-Test Features
  • 55 Dedicated General-Purpose I/O (GIO) Pins and 39 Additional Peripheral I/Os (PGE)
  • 14 Dedicated General-Purpose I/O (GIO) Pins and 39 Additional Peripheral I/Os (PZ)
  • Flexible Interrupt Handling
  • Eight External Interrupts
  • On-Chip Scan-Base Emulation Logic, IEEE Standard 1149.1(1) (JTAG) Test-Access Port
  • 144-Pin Plastic Low-Profile Quad Flatpack (PGE Suffix)
  • 100-Pin Plastic Low-Profile Quad Flatpack (PZ Suffix)
  • Характеристики

    Program_memory_type

    Flash

    Supplier_package

    LQFP

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=TMS470R1A384&&fileType=pdf

    Screening_level

    Extended

    Schedule_b

    8542310000

    Ram_size

    32 KB

    Program_memory_size

    384 KB

    Product_dimensions

    20 x 20 x 1.4 mm

    Pin_count

    144

    Operating_temperature

    -40 to 125 °C

    Operating_supply_voltage

    1.8 V

    Eccn

    3A991.A.2

    Instruction_set_architecture

    RISC

    Htsn

    8542310001

    Тип интерфейса

    SCI/SPI

    Device_core

    ARM7TDMI

    Data_bus_width

    16, 32 Bit

    Country_of_origin

    United States

    Бренд

    On_chip_adc

    12-chx10-bit

    Min_operating_supply_voltage

    1.71 V

    Number_of_programmable_i_os

    94

    Msl_level

    3

    Mounting

    Surface Mount

    Max_speed

    48 MHz

    Max_processing_temp

    260 °C

    Max_operating_supply_voltage

    2.05 V

    Lead_finish

    Gold

    SKU: TMS470R1A384PGEQ

    Description

    The TMS470R1A384(2) devices are members of the Texas Instruments TMS470R1x family of general-purpose 16/32-bit reduced instruction set computer (RISC) microcontrollers. The A384 microcontroller offers high performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit RISC CPU views memory as a linear collection of bytes numbered upwards from zero. The A384 utilizes the big-endian format where the most significant byte of a word is stored at the lowest-numbered byte and the least significant byte at the highest-numbered byte. High-end embedded control applications demand more performance from their controllers while maintaining low costs. The A384 RISC core architecture offers solutions to these performance and cost demands while maintaining low power consumption. The A384 devices contain the following: ARM7TDMI 16/32-bit RISC CPU TMS470R1x system module (SYS) with 470+ enhancements 384K-byte flash 32K-byte SRAM Zero-pin phase-locked loop (ZPLL) clock module Analog watchdog (AWD) timer Enhanced real-time interrupt (RTI) module Interrupt expansion module (IEM) Two serial peripheral interface (SPI) modules Two serial communications interface (SCI) modules Two standard CAN controllers (SCC) Three inter-integrated circuit (I2C) modules Class II serial interface B (C2SIb) module 10-bit multi-buffered analog-to-digital converter (MibADC), with 12 input channels High-end timer (HET) controlling 12 I/Os External clock prescale (ECP) Expansion bus module (EBM) Up to 87 I/O pins and 1 input-only pin (PGE suffix only), up to 51 I/O pins and 1 input-only pin (PZ suffix only) The functions performed by the 470+ system module (SYS) include: Address decoding Memory protection Memory and peripherals bus supervision Reset and abort exception management Prioritization for all internal interrupt sources Device clock control Parallel signature analysis (PSA) The enhanced real-time interrupt (RTI) module on the A384 has the option to be driven by the oscillator clock. This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt priority, and a device memory map. For a more detailed functional description of the SYS module, see the TMS470R1x System Module Reference Guide (literature number SPNU189). The A384 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte, half-word, and word modes. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory implemented with a 32-bit-wide data bus interface. The flash operates with a system clock frequency of up to 24 MHz. When in pipeline mode, the flash operates with a system clock frequency of up to 48 MHz. For more detailed information on the flash, see the Flash section of this data sheet and the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).

  • High-Performance Static CMOS Technology
  • TMS470R1x 16/32-Bit RISC Core (ARM7TDMI™)
    • 24-MHz System Clock (48-MHz Pipeline)
    • Independent 16/32-Bit Instruction Set
    • Open Architecture With Third-Party Support
    • Built-In Debug Module
  • Integrated Memory
    • 384K-Byte Program Flash
      • Three Banks With 18 Contiguous Sectors
    • 32K-Byte Static RAM (SRAM)
  • Operating Features
    • Core Supply Voltage (VCC): 1.71 V to 2.05 V
    • I/O Supply Voltage (VCCIO): 3.0V to 3.6 V
    • Low-Power Modes: STANDBY and HALT
    • Extended Industrial Temperature Range
  • 470+ System Module
    • 32-Bit Address Space Decoding
    • Bus Supervision for Memory/Peripherals
    • Analog Watchdog (AWD) Timer
    • Enhanced Real-Time Interrupt (RTI)
    • Interrupt Expansion Module (IEM)
    • System Integrity and Failure Detection
  • Direct Memory Access (DMA) Controller
    • 32 Control Packets and 16 Channels
  • Zero-Pin Phase-Locked Loop (ZPLL)-Based Clock Module With Prescaler
    • Multiply-by-4 or -8 Internal ZPLL Option
    • ZPLL Bypass Mode
  • Expansion Bus Module (EBM) (PGE Package)
    • Supports 8- and 16-Bit Expansion Bus Memory Interface Mappings
    • 40 I/O Expansion Bus Pins
  • Ten Communication Interfaces:
    • Two Serial Peripheral Interfaces (SPIs)
      • 255 Programmable Baud Rates
    • Two Serial Communication Interfaces (SCIs)
      • 224 Selectable Baud Rates
      • Asynchronous/Isosynchronous Modes
    • Two Standard CAN Controllers (SCC)
      • 16-Mailbox Capacity
      • Fully Compliant With CAN Protocol, Version 2.0B
    • Class II Serial Interface B (C2SIb)
      • Normal 10.4 Kbps and 4X Mode 41.6 Kbps
    • Three Inter-Integrated Circuit (I2C) Modules (See I2C Notes in TMS470R1A384 Silicon Errata, Literature Number SPNZ148)
      • Multi-Master and Slave Interfaces
      • Up to 400 Kbps (Fast Mode)
      • 7- and 10-Bit Address Capability
  • High-End Timer (HET)
    • 12 Programmable I/O Channels:
      • 12 High-Resolution Pins
    • High-Resolution Share Feature (XOR)
    • High-End Timer RAM
      • 64-Instruction Capacity
  • External Clock Prescale (ECP) Module
    • Programmable Low-Frequency External Clock (CLK)
  • 12-Channel 10-Bit Multi-Buffered Analog-to-Digital Converter (MibADC)
    • 32-Word FIFO Buffer
    • Single- or Continuous-Conversion Modes
    • 1.55-µsMinimum Sample/Conversion Time
    • Calibration Mode and Self-Test Features
  • 55 Dedicated General-Purpose I/O (GIO) Pins and 39 Additional Peripheral I/Os (PGE)
  • 14 Dedicated General-Purpose I/O (GIO) Pins and 39 Additional Peripheral I/Os (PZ)
  • Flexible Interrupt Handling
  • Eight External Interrupts
  • On-Chip Scan-Base Emulation Logic, IEEE Standard 1149.1(1) (JTAG) Test-Access Port
  • 144-Pin Plastic Low-Profile Quad Flatpack (PGE Suffix)
  • 100-Pin Plastic Low-Profile Quad Flatpack (PZ Suffix)
  • Additional information

    Program_memory_type

    Flash

    Supplier_package

    LQFP

    Specifications

    http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=TMS470R1A384&&fileType=pdf

    Screening_level

    Extended

    Schedule_b

    8542310000

    Ram_size

    32 KB

    Program_memory_size

    384 KB

    Product_dimensions

    20 x 20 x 1.4 mm

    Pin_count

    144

    Operating_temperature

    -40 to 125 °C

    Operating_supply_voltage

    1.8 V

    Eccn

    3A991.A.2

    Instruction_set_architecture

    RISC

    Htsn

    8542310001

    Тип интерфейса

    SCI/SPI

    Device_core

    ARM7TDMI

    Data_bus_width

    16, 32 Bit

    Country_of_origin

    United States

    Бренд

    On_chip_adc

    12-chx10-bit

    Min_operating_supply_voltage

    1.71 V

    Number_of_programmable_i_os

    94

    Msl_level

    3

    Mounting

    Surface Mount

    Max_speed

    48 MHz

    Max_processing_temp

    260 °C

    Max_operating_supply_voltage

    2.05 V

    Lead_finish

    Gold