Описание
The Kinetis K60 100 MHz IEEE 1588 Ethernet MCUs are built on the ARM Cortex -M4 core and feature advanced analog integration and serial communication. Available down to a 5 mm x 5 mm wafer-level chip-scale package (WLCSP), these devices maximize board space and enhance performance with minimum-length interconnections, allowing the miniaturization of existing applications. This family shares the comprehensive enablement and scalability of the Kinetis portfolio.
Ultra-Low-Power
- 10 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents down to 2 µA, andrun currents of <350 µa/mhz,="" with="" 4="" µs="" wake-up="" from="" stop="">
- Full memory and analog operation down to 1.71 volts for extended battery life
- Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
- Low-power timer for continual system operation in reduced power state
Flash, SRAM and FlexMemory
- 256 KB – 512 KB flash. Fast access, high reliability with four-level security protection
- 64 KB-128 KB of SRAM
- FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup
Mixed-Signal Capability
- Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 863 ns conversion time achievable with programmable delay block triggering
- Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications
- Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state
- Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost
Performance
- ARM Cortex-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions
- 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput
- Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth
- Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines
Timing and Control
- Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control
- Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block
Human-Machine Interface
- Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick
