Описание
The LPC11D00 series is capable of driving any static or multiplexed Liquid Crystal Displays containing up to 4 backplanes and 40 segments, and can be easily cascaded with multiple segment LCD drivers to accommodate up to 2560 segments for larger display applications. The LPC11D00 supports up to 32 kB of Flash, 8 kB of SRAM and offers a rich peripheral set including 2 SSPs, I²C (FM+), UART, 4 system timers and a 8-channel high-precision 10-bit ADC. As an extension of the energy efficient LPC1100L family, the LPC11D00 also features unique API-driven power profiles providing users with ready-to-use power management templates allowing designers to do runtime optimization of performance, efficiency and active power consumption with simple API calls.
- LCD driver
- 40 segments.
- One to four backplanes.
- On-chip display RAM with auto-increment addressing.
- System:
- ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
- ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
- Serial Wire Debug.
- System tick timer.
- Memory:
- 32 kB on-chip flash programming memory.
- 8 kB SRAM.
- In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
- Digital peripherals:
- 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors. In addition, a configurable open-drain mode is supported.
- GPIO pins can be used as edge and level sensitive interrupt sources.
- High-current output driver (20 mA) on one pin.
- High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
- Four general purpose counter/timers with a total of four capture inputs and 13 match outputs.
- Programmable windowed WatchDog Timer (WDT).
- Analog peripherals:
- 10-bit ADC with input multiplexing among 8 pins.
- Serial interfaces:
- UART with fractional baud rate generation, internal FIFO, and RS-485 support.
- Two SPI controllers with SSP features and with FIFO and multi-protocol capabilities.
- I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode.
- Clock generation:
- 12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a system clock.
- Crystal oscillator with an operating range of 1 MHz to 25 MHz.
- Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.
- PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.
- Clock output function with divider that can reflect the system oscillator clock, IRC clock, CPU clock, and the Watchdog clock.
- Power control:
- Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes.
- Power profiles residing in boot ROM allowing to optimize performance and minimize power consumption for any given application through one simple function call.
- Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
- Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the functional pins.
- Power-On Reset (POR).
- Brownout detect with four separate thresholds for interrupt and forced reset.
- Unique device serial number for identification.
- Single power supply (1.8 V to 3.6 V).
- Available as 100-pin LQFP100 package.
