Описание
The SMART SAM7XC512 is a member of a series of highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor. It features 512 Kbytes of high-speed Flash and 128 Kbytes of SRAM, an extensive peripheral set, including an 802.3 Ethernet MAC, a CAN controller, an AES128 encryption accelerator and a TDES. A complete set of system functions minimizes the number of external components. The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface on a production programmer prior to mounting. Built-in lock bits and a security bit protect the firmware from accidental overwrite and preserve its confidentiality. The SAM7XC512 system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator.
- Incorporates the ARM7TDMI® ARM Thumb® Processor
- High-performance 32-bit RISC Architecture
- High-density 16-bit Instruction Set
- Leader in MIPS/Watt
- Embedded ICE In-circuit Emulation, Debug Communication Channel Support
- Internal High-speed Flash
- 512 Kbytes (SAM7XC512) Organized in Two Banks of 1024 of 256 Bytes (Dual Plane)
- Single Cycle Access at Up to 30 MHz in Worst Case Conditions
- Prefect Buffer Optimizing Thumb Instruction Execution at Maximum Speed
- Programming Time: 6 ms, Including Auto-erase, Full Erase Time: 15 ms
- 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit
- Fast Flash Programming Interface for High Volume Production
- Internal High-speed SRAM, Single-cycle Access at Maximum Speed
- 128 Kbytes (SAM7XC512)
- Memory Controller (MC)
- Embedded Flash Controller, Abort Status and Misalignment Detection
- Reset Controller (RSTC)
- Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector
- Provides External Reset Signal Shaping and Reset Source Status
- Clock Generator (CKGR)
- Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
- Power Management Controller (PMC)
- Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode
- Four Programmable External Clock Signals
- Advanced Interrupt Controller (AIC)
- Individually Mask able, Eight-level Priority, Vectored Interrupt Sources
- Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
- Debug Unit (DBGU)
- 2-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention
- Mode for General Purpose 2-wire UART Serial Communication
- Periodic Interval Timer (PIT)
- 20-bit Programmable Counter plus 12-bit Interval Counter
- Windowed Watchdog (WDT)
- 12-bit Key-protected Programmable Counter
- Provides Reset or Interrupt Signals to the System
- Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
- Real-time Timer (RTT)
- 32-bit Free-running Counter with Alarm
- Runs Off the Internal RC Oscillator
- Two Parallel Input/output Controllers (PIO)
- Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
- Input Change Interrupt Capability on Each I/O Line
- Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
- Seventeen Peripheral DMA Controller (PDC) Channels
