MCU 32-Bit Kinetics V ARM Cortex M0+ RISC 64KB Flash 1.8V/2.5V/3.3V 48-Pin LQFP Tray, MKV10Z64VLF7, NXP

The Kinetis KV1x MCU family is the entry point of the V series. Built upon the ARM Cortex -M0+ core running at 75 MHz with hardware square root and divide capability, it delivers a 27% increase in performance in math-intensive applications versus comparable MCUs, allowing it to target BLDC as well as more computationally demanding PMSM motors. Additional features include integrated FlexCAN, dual 16-bit analog-to-digital controllers (ADCs) sampling at up to 1.2 mega samples per second (MS/s) in 12-bit mode, multiple motor control timers, up to 128 KB of flash memory and a comprehensive enablement suite from NXP and third-party resources, including reference designs, software libraries and motor configuration tools.

  • 75 MHz Cortex-M0+ core with hardware square root and divide block— improves performance in math-intensive applications (e.g., processing of sensorless field-oriented control (FOC) algorithms)
  • 4-channel DMA — reduced CPU loading for improved application performance
  • 2x 16-bit ADCs with two capture and hold circuits and up to 1.2 MS/s samples rate in 12-bit mode — simultaneous measurement of current and voltage phase, reduced jitter on input values improving system accuracy 12-bit mode
  • Up to 2 x 6-channel and 4 x 2 -channel programmable FlexTimers — High-accuracy PWM generation with integrated power factor correction or speed sensor decoder (incremental decoder/hall sensor)
  • 12-bit DAC and 2 x ACPMs (analog comparators)— over-current and over-voltage fault detection, reduced BOM costs. ADC and ACMP interconnect with PWM and PDB (programmable delay) blocks for real-time hardware control
  • Dual watchdogs — compliance with IEC 60730 safety regulation requirements
  • Broad family scalability with hardware and software compatibility — easy migration to more performance, memory and feature integration within the Kinetis® V series

Характеристики

Program_memory_type

Flash

Supplier_package

LQFP

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGL-S-A0003205394/PHGL-S-A0003205394-1.pdf?hkey=52A5661711E402568146F3353EA87419

Screening_level

Extended Industrial

Schedule_b

8542310000

Ram_size

2 KB

Program_memory_size

8 KB

Product_dimensions

7 x 7 x 1.4 mm

Pin_count

48

Operating_temperature

-40 to 105 °C

Operating_supply_voltage

1.8, 2.5, 3.3 V

Watchdog

2

Analog_comparators

2

Eccn

3A991.A.2

Instruction_set_architecture

RISC

Htsn

8542310001

Тип интерфейса

I2C/SPI/UART

Device_core

ARM Cortex M0+

Data_bus_width

32 Bit

Country_of_origin

China

Бренд

Min_operating_supply_voltage

1.71 V

Number_of_timers

8

Number_of_programmable_i_os

40

Msl_level

3

Mounting

Surface Mount

Max_speed

75 MHz

Max_processing_temp

260 °C

Max_operating_supply_voltage

3.6 V

Lead_finish

Matte Tin

Артикул: MKV10Z64VLF7

Описание

The Kinetis KV1x MCU family is the entry point of the V series. Built upon the ARM Cortex -M0+ core running at 75 MHz with hardware square root and divide capability, it delivers a 27% increase in performance in math-intensive applications versus comparable MCUs, allowing it to target BLDC as well as more computationally demanding PMSM motors. Additional features include integrated FlexCAN, dual 16-bit analog-to-digital controllers (ADCs) sampling at up to 1.2 mega samples per second (MS/s) in 12-bit mode, multiple motor control timers, up to 128 KB of flash memory and a comprehensive enablement suite from NXP and third-party resources, including reference designs, software libraries and motor configuration tools.

  • 75 MHz Cortex-M0+ core with hardware square root and divide block— improves performance in math-intensive applications (e.g., processing of sensorless field-oriented control (FOC) algorithms)
  • 4-channel DMA — reduced CPU loading for improved application performance
  • 2x 16-bit ADCs with two capture and hold circuits and up to 1.2 MS/s samples rate in 12-bit mode — simultaneous measurement of current and voltage phase, reduced jitter on input values improving system accuracy 12-bit mode
  • Up to 2 x 6-channel and 4 x 2 -channel programmable FlexTimers — High-accuracy PWM generation with integrated power factor correction or speed sensor decoder (incremental decoder/hall sensor)
  • 12-bit DAC and 2 x ACPMs (analog comparators)— over-current and over-voltage fault detection, reduced BOM costs. ADC and ACMP interconnect with PWM and PDB (programmable delay) blocks for real-time hardware control
  • Dual watchdogs — compliance with IEC 60730 safety regulation requirements
  • Broad family scalability with hardware and software compatibility — easy migration to more performance, memory and feature integration within the Kinetis® V series

Детали

Program_memory_type

Flash

Supplier_package

LQFP

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGL-S-A0003205394/PHGL-S-A0003205394-1.pdf?hkey=52A5661711E402568146F3353EA87419

Screening_level

Extended Industrial

Schedule_b

8542310000

Ram_size

2 KB

Program_memory_size

8 KB

Product_dimensions

7 x 7 x 1.4 mm

Pin_count

48

Operating_temperature

-40 to 105 °C

Operating_supply_voltage

1.8, 2.5, 3.3 V

Watchdog

2

Analog_comparators

2

Eccn

3A991.A.2

Instruction_set_architecture

RISC

Htsn

8542310001

Тип интерфейса

I2C/SPI/UART

Device_core

ARM Cortex M0+

Data_bus_width

32 Bit

Country_of_origin

China

Бренд

Min_operating_supply_voltage

1.71 V

Number_of_timers

8

Number_of_programmable_i_os

40

Msl_level

3

Mounting

Surface Mount

Max_speed

75 MHz

Max_processing_temp

260 °C

Max_operating_supply_voltage

3.6 V

Lead_finish

Matte Tin