Описание
The AT32UC3L0256 is a complete system-on-chip microcontroller based on the AVR32 UC RISC processor running at frequencies up to 50MHz. AVR32 UC is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density, and high performance. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern and real-time operating systems. The Secure Access Unit (SAU) is used together with the MPU to provide the required security and integrity. Higher computation capability is achieved using a rich set of DSP instructions. The AT32UC3L0256 embeds state-of-the-art picoPower technology for ultra-low power consumption. Combined power control techniques are used to bring active current consumption down to 174µA/MHz, and leakage down to 220nA while still retaining a bank of backup registers. The device allows a wide range of trade-offs between functionality and power consumption, giving the user the ability to reach the lowest possible power consumption with the feature set required for the application. The Peripheral Direct Memory Access (DMA) controller enables data transfers between peripherals and memories without processor involvement. The Peripheral DMA controller drastically reduces processing overhead transferring continuous and large data streams. The AT32UC3L0256 incorporates on-chip Flash and SRAM memories for secure and fast access. The Flash Vault technology allows secure libraries to be programmed into the device. The secure libraries can be executed while the CPU is in Secure State, but not read by nonsecure software in the device. The device can thus be shipped to end customers, who will be able to program their own code into the device to access the secure libraries, but without risk of compromising the proprietary secure code.
- High-performance, Low-power 32-bit AVR® Microcontroller
- Compact Single-cycle RISC Instruction Set Including DSP Instructions
- Read-modify-write Instructions and Atomic Bit Manipulation
- Performance
- Up to 64DMIPS Running at 50MHz from Flash (1 Flash Wait State)
- Up to 36DMIPS Running at 25MHz from Flash (0 Flash Wait State)
- Memory Protection Unit (MPU)
- Secure Access Unit (SAU) providing User-defined Peripheral Protection
- picoPower® Technology for Ultra-low Power Consumption
- Multi-hierarchy Bus System
- High-performance Data Transfers on Separate Buses for Increased Performance
- 12 Peripheral DMA Channels Improve Speed for Peripheral Communication
- Internal High-speed Flash
- 256Kbytes and 128Kbytes Versions
- Single-cycle Access up to 25MHz
- Flash Vault Technology Allows Pre-programmed Secure Library Support for End User Applications
- Prefect Buffer Optimizing Instruction Execution at Maximum Speed
- 100,000 Write Cycles, 15-year Data Retention Capability
- Flash Security Locks and User-defined Configuration Area
- Internal High-speed SRAM, Single-cycle Access at Full Speed
- 32Kbytes
- Interrupt Controller (INTC)
- Auto vectored Low-latency Interrupt Service with Programmable Priority
- External Interrupt Controller (EIC)
- Peripheral Event System for Direct Peripheral to Peripheral Communication
- System Functions
- Power and Clock Manager
- SleepWalking Power Saving Control
- Internal System RC Oscillator (RCSYS)
- 32 KHz Oscillator
- Multipurpose Oscillator, Phase Locked Loop (PLL), and Digital Frequency Locked Loop (DFLL)
- Windowed Watchdog Timer (WDT)
- Asynchronous Timer (AST) with Real-time Clock Capability
- Counter or Calendar Mode Supported
- Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency
- Six 16-bit Timer/Counter (TC) Channels
- External Clock Inputs, PWM, Capture, and Various Counting Capabilities
- PWM Channels on All I/O Pins (PWMA)
- 8-bit PWM with a Source Clock up to 150MHz
- Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
- Independent Baud rate Generator, Support for SPI
- Support for Hardware Handshaking
- One Master/Slave Serial Peripheral Interface (SPI) with Chip Select Signals
- Up to 15 SPI Slaves can be Addressed
