Description
This LSI is a single-chip RISC microprocessor that integrates a Renesas Technology-original RISC-type SuperHTM architecture CPU as its core that has an on-chip multiplier, cache memory, and a memory management unit (MMU) as well as peripheral functions required for system configuration such as a timer, a real time clock, an interrupt controller, and a serial communication interface. This LSI includes data protection, virtual memory, and other functions provided by incorporating an MMU into a SuperH Series microprocessor (SH-1 or SH-2).High-speed data transfers can be performed by an on-chip direct memory access controller (DMAC) and an external memory access support function enables direct connection to different types of memory. The SH7709S microprocessor also supports an infrared communication function, an A/D converter, and a D/A converter.A powerful built-in power management function keeps power consumption low, even during high speed operation. This LSI can run at six times the frequency of the system bus operating speed, making it optimum for electrical devices such as PDAs that require both high speed and low power.
- Original Renesas Technology SuperH architecture
- Object code level with SH-1, SH-2, and SH-3 Series
- 32-bit internal data bus
- General-register files
- Sixteen 32-bit general registers (eight 32-bit shadow registers)
- Eight 32-bit control registers
- Four 32-bit system registers
- RISC-type instruction set
- Instruction length: 16-bit fixed length for improved code efficiency
- Load-store architecture
- Delayed branch instructions
- Instruction set based on C language
- Instruction execution time: one instruction/cycle for basic instructions
- Logical address space: 4 Gbytes
- Space identifier ASID: 8 bits, 256 logical address space
- Five-stage pipeline
