MCU 16-bit/32-bit H8 CISC 8KB Flash 3.3V/5V 32-Pin LQFP, DF36912GFHWV, Renesas Electronics

The H8/36912 Group and H8/36902 Group are single-chip microcomputers made up of the high speed H8/300H CPU employing Renesas Technology original architecture as their cores, and the peripheral functions required to configure a system. The H8/300H CPU has an instruction set that is compatible with the H8/300 CPU.

  • High-speed H8/300H central processing unit with an internal 16-bit architecture
    • Upward-compatible with H8/300 CPU on an object level
    • Sixteen 16-bit general registers
    • 62 basic instructions
  • Various peripheral functions
    • Timer B1* (8-bit timer)
    • Timer V (8-bit timer)
    • Timer W (16-bit timer)
    • Watchdog timer
    • SCI3 (Asynchronous or clocked synchronous serial communication interface)
    • 10-bit A/D converter
    • I2C bus interface
    • POR/LVD (Power-on reset and low-voltage detection circuits)
    • Address break

Характеристики

Schedule_b

8542310000

Operating_supply_voltage

3.3, 5 V

Operating_temperature

-40 to 85 °C

Pin_count

32

Product_dimensions

7 x 7 x 1.4 mm

On_chip_adc

4-chx10-bit

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/RNCC/RNCCS09095/RNCCS09095-1.pdf?hkey=52A5661711E402568146F3353EA87419

Supplier_package

LQFP

Watchdog

1

Max_speed

12 MHz

Number_of_timers

3

Бренд

Instruction_set_architecture

CISC

Country_of_origin

United States

Data_bus_width

16, 32 Bit

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

I2C/SCI

Number_of_programmable_i_os

18

Max_expanded_memory_size

64 KB

Mounting

Surface Mount

SKU: DF36912GFHWV

Description

The H8/36912 Group and H8/36902 Group are single-chip microcomputers made up of the high speed H8/300H CPU employing Renesas Technology original architecture as their cores, and the peripheral functions required to configure a system. The H8/300H CPU has an instruction set that is compatible with the H8/300 CPU.

  • High-speed H8/300H central processing unit with an internal 16-bit architecture
    • Upward-compatible with H8/300 CPU on an object level
    • Sixteen 16-bit general registers
    • 62 basic instructions
  • Various peripheral functions
    • Timer B1* (8-bit timer)
    • Timer V (8-bit timer)
    • Timer W (16-bit timer)
    • Watchdog timer
    • SCI3 (Asynchronous or clocked synchronous serial communication interface)
    • 10-bit A/D converter
    • I2C bus interface
    • POR/LVD (Power-on reset and low-voltage detection circuits)
    • Address break

Additional information

Schedule_b

8542310000

Operating_supply_voltage

3.3, 5 V

Operating_temperature

-40 to 85 °C

Pin_count

32

Product_dimensions

7 x 7 x 1.4 mm

On_chip_adc

4-chx10-bit

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/RNCC/RNCCS09095/RNCCS09095-1.pdf?hkey=52A5661711E402568146F3353EA87419

Supplier_package

LQFP

Watchdog

1

Max_speed

12 MHz

Number_of_timers

3

Бренд

Instruction_set_architecture

CISC

Country_of_origin

United States

Data_bus_width

16, 32 Bit

Eccn

EAR99

Htsn

8542310001

Тип интерфейса

I2C/SCI

Number_of_programmable_i_os

18

Max_expanded_memory_size

64 KB

Mounting

Surface Mount