MCU 16-bit PIC24 PIC RISC 16KB Flash 3.3V 44-Pin QFN EP T/R, PIC24HJ16GP304T-I/ML, Microchip

MCU 16-bit PIC24 PIC RISC 16KB Flash 3.3V 44-Pin QFN EP T/R

  • Modified Harvard architecture
  • C compiler optimized instruction set
  • 16-bit wide data path
  • 24-bit wide instructions
  • Linear program memory addressing up to 4M instruction words
  • Linear data memory addressing up to 64 Kbytes
  • 71 base instructions, mostly 1 word/1 cycle
  • Sixteen 16-bit General Purpose Registers
  • Flexible and powerful addressing modes
  • Software stack
  • 16 x 16 multiply operations
  • 32/16 and 16/16 divide operations
  • Up to ±16-bit shifts for up to 40-bit data
  • Flash program memory (up to 32 Kbytes)
  • Data SRAM (2 Kbytes)
  • Boot and General Security for Program Flash
  • Power-up Timer
  • Oscillator Start-up Timer/Stabilizer
  • Watchdog Timer with its own RC oscillator
  • Fail-Safe Clock Monitor
  • Reset by multiple sources
  • On-chip 2.5V voltage regulator
  • Switch between clock sources in real time
  • Idle, Sleep and Doze modes with fast wake-up
  • Tape and Reel Packaging

Характеристики

Schedule_b

8542310000

Operating_supply_voltage

3.3 V

Operating_temperature

-40 to 85 °C

Pin_count

44

Product_dimensions

8 x 8 x 0.88 mm

Program_memory_size

16 KB

Ram_size

2 KB

Screening_level

Industrial

On_chip_adc

13-chx12-bit

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/MCHP/MCHPS03985/MCHPS03985-1.pdf?hkey=52A5661711E402568146F3353EA87419

Supplier_package

QFN EP

Max_speed

40 MHz

Number_of_timers

3

Бренд

Instruction_set_architecture

RISC

Country_of_origin

Thailand

Eccn

3A991.A.2

Htsn

8542310001

Тип интерфейса

I2C/SPI/UART

Number_of_programmable_i_os

35

Lead_finish

Matte Tin

Max_expanded_memory_size

64 KB

Max_operating_supply_voltage

3.6, 3.9 V

Max_processing_temp

260 °C

Min_operating_supply_voltage

2.7, 3 V

Mounting

Surface Mount

Msl_level

1

Артикул: PIC24HJ16GP304T-I/ML

Описание

MCU 16-bit PIC24 PIC RISC 16KB Flash 3.3V 44-Pin QFN EP T/R

  • Modified Harvard architecture
  • C compiler optimized instruction set
  • 16-bit wide data path
  • 24-bit wide instructions
  • Linear program memory addressing up to 4M instruction words
  • Linear data memory addressing up to 64 Kbytes
  • 71 base instructions, mostly 1 word/1 cycle
  • Sixteen 16-bit General Purpose Registers
  • Flexible and powerful addressing modes
  • Software stack
  • 16 x 16 multiply operations
  • 32/16 and 16/16 divide operations
  • Up to ±16-bit shifts for up to 40-bit data
  • Flash program memory (up to 32 Kbytes)
  • Data SRAM (2 Kbytes)
  • Boot and General Security for Program Flash
  • Power-up Timer
  • Oscillator Start-up Timer/Stabilizer
  • Watchdog Timer with its own RC oscillator
  • Fail-Safe Clock Monitor
  • Reset by multiple sources
  • On-chip 2.5V voltage regulator
  • Switch between clock sources in real time
  • Idle, Sleep and Doze modes with fast wake-up
  • Tape and Reel Packaging

Детали

Schedule_b

8542310000

Operating_supply_voltage

3.3 V

Operating_temperature

-40 to 85 °C

Pin_count

44

Product_dimensions

8 x 8 x 0.88 mm

Program_memory_size

16 KB

Ram_size

2 KB

Screening_level

Industrial

On_chip_adc

13-chx12-bit

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/MCHP/MCHPS03985/MCHPS03985-1.pdf?hkey=52A5661711E402568146F3353EA87419

Supplier_package

QFN EP

Max_speed

40 MHz

Number_of_timers

3

Бренд

Instruction_set_architecture

RISC

Country_of_origin

Thailand

Eccn

3A991.A.2

Htsn

8542310001

Тип интерфейса

I2C/SPI/UART

Number_of_programmable_i_os

35

Lead_finish

Matte Tin

Max_expanded_memory_size

64 KB

Max_operating_supply_voltage

3.6, 3.9 V

Max_processing_temp

260 °C

Min_operating_supply_voltage

2.7, 3 V

Mounting

Surface Mount

Msl_level

1