Описание
The PIC24F16KL402 family adds an entire range of economical, low pin count and low-power devices to Microchip’s portfolio of 16-bit microcontrollers. Aimed at applications that require low-power consumption but more computational ability than an 8-bit platform can provide, these devices offer a range of tailored peripheral sets that allow the designer to optimize both price point and features with no sacrifice of functionality
- Power Management Modes:
- Run – CPU, Flash, SRAM and Peripherals on
- Doze – CPU Clock Runs Slower than Peripherals
- Idle – CPU Off, SRAM and Peripherals on
- Sleep – CPU, Flash and Peripherals Off and SRAM on
- Low-Power Consumption:
- Run mode currents under 350 µA/MHz at 1.8V
- Idle mode currents under 80 µA/MHz at 1.8V
- Sleep mode currents as low as 30 nA at 25°C
- Watchdog Timer as low as 210 nA at 25°C
- High-Performance CPU:
- Modified Harvard Architecture
- Up to 16 MIPS Operation @ 32 MHz
- 8 MHz Internal Oscillator:
- 4x PLL option
- Multiple divide options
- 17-Bit x 17-Bit Single-Cycle Hardware Fractional/integer Multiplier
- 32-Bit by 16-Bit Hardware Divider
- 16 x 16-Bit Working Register Array
- C Compiler Optimized Instruction Set Architecture (ISA):
- 76 base instructions
- Flexible addressing modes
- Linear Program Memory Addressing
- Linear Data Memory Addressing
- Two Address Generation Units (AGU) for Separate Read and Write Addressing of Data Memory
- Peripheral Features:
- High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
- Configurable Open-Drain Outputs on Digital I/O Pins
- Up to Three External Interrupt Sources
- Two 16-Bit Timer/Counters with Selectable Clock Sources
- Up to Two 8-Bit Timers/Counters with Programmable Prescalers
- Two Capture/Compare/PWM (CCP) modules:
- Modules automatically configure and drive I/O
- 16-bit Capture with max. resolution 40 ns
- 16-bit Compare with max. resolution 83.3 ns
- 1-bit to 10-bit PWM resolution
- 3-wire SPI (all four modes)
- I2C Master, Multi-Master and Slave modes and 7-Bit/10-Bit Addressing
- Supports RS-485, RS-232 and LIN/J2602
- On-chip hardware encoder/decoder for IrDA
- Auto-wake-up on Start bit
- Auto-Baud Detect (ABD)
- Two-byte transmit and receive FIFO buffers
- 500 ksps conversion rate
- Conversion available during Sleep and Idle
- Detects clock failure and switches to on-chip, low-power RC oscillator
- Uses its own low-power RC oscillator
- Windowed operating modes
- Configurable for software controlled operation and shutdown in Sleep mode
- Selectable trip points (1.8V, 2.7V and 3.0V)
- Low-power 2.0V POR re-arm