Description
The H8S/2000 Group are microcomputers (MCU) made up of the H8S/2600 CPU employing Renesas Electronics’s original architecture as their cores, and theperipheral functions required to configure a system. The H8S/2600 CPU has aninternal 32-bit configuration, sixteen 16-bit general registers, and a simpleand optimized instruction set for high-speed operation. The H8S/2600 CPU canhandle a 16-Mbyte linear address space.This LSI is equipped with direct memory access controller (DMAC) and datatransfer controller (DTC) bus masters, ROM and RAM memory, a 16-bit timer pulseunit (TPU), a programmable pulse generator (PPG), 8-bit timers (TMR), awatchdog timer (WDT), serial communication interfaces (SCI and IrDA), a 10-bitA/D converter, an 8-bit D/A converter, and I/O ports as onchip peripheralmodules required for system configuration. I2C bus interface 2 (IIC2) can alsobe included as an optional interface.A high-functionality bus controller is also provided, enabling fast and easyconnection of DRAM and other kinds of memory.A single-power flash memory version is available for this LSI"s ROM. Thisprovides flexibility as it can be reprogrammed in no time to cope with allsituations from the early stages of mass production to full-scale massproduction. This is particularly applicable to application devices withspecifications that will most probably change.
- Operating frequency (MHz)/Supply voltage (V) o33MHz/3.0 to 3.6V oMinimum instruction execution time: 30ns
- On-chip memory o512kB/32kB: H8S/2368F o384kB/32kB : H8S/2364F o384kB/24kB : H8S/2367F o256kB/32kB : H8S/2362F o256kB/24kB : H8S/2361F o256kB/16kB : H8S/2360F o256kB/16kB: H8S/2365 o-/16kB : H8S/2363
