Description
The H8S/2140B Group are microcomputers (MCUs) made up of the H8S/2000 CPU employing Renesas Technology original architecture as their cores, and the peripheral functions required to configure a system.The H8S/2000 CPU has an internal 32-bit configuration, sixteen 16-bit general registers, and a simple and optimized instruction set for high-speed operation. The H8S/2000 CPU can handle a 16-Mbyte linear address space.This LSI is equipped with a data transfer controller (DTC) as a bus master, ROM, RAM, an 8-bit PWM timer (PWM), a 14-bit PWM timer (PWMX), a 16-bit free-running timer (FRT), an 8-bit timer (TMR), timer connection, a watchdog timer (WDT), a serial communication interface (SCI), a keyboard buffer controller, a host interface X-bus interface (XBS), a host interface LPC interface (LPC), an 8-bit D/A converter, a 10-bit A/D converter, and I/O ports as on-chip peripheral modules required for system configuration. An I2 C bus interface (IIC) can also be included as an optional interface. A high-functionality bus controller is also provided, enabling fast and easy connection of DRAM and other kinds of memory.
- High-speed H8S/2000 central processing unit with an internal 16-bit architecture
- Upward-compatible with H8/300 and H8/300H CPUs on an object level
- Sixteen 16-bit general registers
- 65 basic instructions
- Various peripheral functions
- Data transfer controller (DTC)
- 8-bit PWM timer (PWM)
- 14-bit PWM timer (PWMX)
- 16-bit free-running timer (FRT)
- 8-bit timer (TMR)
- Timer connection
- Watchdog timer (WDT)
- Asynchronous or clocked synchronous serial communication interface (SCI, IrDA)
- I2C bus interface (IIC)
- Keyboard buffer controller
- Host interface X-BUS interface (XBS)
- Host interface LPC interface (LPC)
- 8-bit D/A converter
- 10-bit A/D converter
- Clock pulse generator
