MCU A700x MX51 1.8V/3.3V/5V 32-Pin HVQFN EP, A7001CMHN1/T1AGCEL, NXP

The A7001 family is a tamper resistant secure Micro Controller Unit (MCU) family using a dedicated security hardened MX51CPU. NXP Semiconductors has a long track record in security MCUs. NXP ICs have been used in all types of security applications such as bank cards, health insurance cards, electronic passports, and pay-TV cards. They have also been used as embedded secure element in mobile phones. The A7001 family features a significantly enhanced secure microcontroller architecture. Extended instructions for Java and C code, linear addressing and high speed at low power are among many other improvements added to the classic 80C51 core architecture.

  • High reliable EEPROM for both data storage and program execution: 80 kB
    • Data retention time: 25 years minimum
    • Endurance: 500,000 cycles minimum
  • Dedicated Secure_MX51 MCU (Memory eXtended/enhanced 80C51)
  • 100 kbit/s I2C slave interface
  • Optional ISO/IEC 7816 contact interface
  • Optional ISO/IEC 14443 A Contactless Interface Unit (CIU)
  • Public Key Cryptography (PKC) coprocessor supporting RSA, Elgamal, DSS, Diffie-Hellman, Guillou-Quisquater, Fiat-Shamir and Elliptic Curves
    • RSA support for the key lengths up to 2048 bit
    • Elliptic Curve over GF(p) Cryptography with key lengths up to 320 bit
  • Single DES (56 bit) and Triple DES with 2 or 3 Keys (112 bit or 168 bit), encryption and decryption in ECB, CBC and CBC-MAC mode
  • High-speed AES coprocessor (128-bit parallel processing AES engine)
  • Low-power True Random Number Generator (TRNG) in hardware, AIS-31 compliant
  • SHA1, SHA-224 and SHA-256
  • SEED algorithm
  • MD5
  • On-Chip Key generation
  • CRC calculations
  • Data Authentication Pattern (DAP) for the Supplementary Security Domains
  • Low power and low voltage design using NXP Semiconductors handshaking technology
  • Power-saving SLEEP mode
  • Wake-up from SLEEP mode by any I2C communication request
  • 40 µA typical sleep mode current with I2C pads operated in weak pull-up mode, do not obstruct the bus lines
  • Internally generated CPU clock (typical 62 MHz)
  • 1.62 V to 5.5 V operating voltage range

Характеристики

Pin_count

32

Operating_supply_voltage

1.8, 3.3, 5 V

Operating_temperature

-25 to 85 °C

Product_dimensions

5 x 5 x 0.95(Max)

Min_operating_supply_voltage

1.62 V

Ram_size

3.2 Kb

Schedule_b

8542310000

Screening_level

Industrial

Specifications

http://www.nxp.com/documents/short_data_sheet/A700X_FAM_SDS.pdf

Supplier_package

HVQFN EP

Mounting

Surface Mount

Maximum_speed

62 MHz

Eccn

5A992

Бренд

Country_of_origin

Taiwan

Data_memory_size

76.4 Kb

Device_core

MX51

Htsn

8542310001

Тип интерфейса

I2C

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1000 mW

SKU: A7001CMHN1/T1AGCEL

Description

The A7001 family is a tamper resistant secure Micro Controller Unit (MCU) family using a dedicated security hardened MX51CPU. NXP Semiconductors has a long track record in security MCUs. NXP ICs have been used in all types of security applications such as bank cards, health insurance cards, electronic passports, and pay-TV cards. They have also been used as embedded secure element in mobile phones. The A7001 family features a significantly enhanced secure microcontroller architecture. Extended instructions for Java and C code, linear addressing and high speed at low power are among many other improvements added to the classic 80C51 core architecture.

  • High reliable EEPROM for both data storage and program execution: 80 kB
    • Data retention time: 25 years minimum
    • Endurance: 500,000 cycles minimum
  • Dedicated Secure_MX51 MCU (Memory eXtended/enhanced 80C51)
  • 100 kbit/s I2C slave interface
  • Optional ISO/IEC 7816 contact interface
  • Optional ISO/IEC 14443 A Contactless Interface Unit (CIU)
  • Public Key Cryptography (PKC) coprocessor supporting RSA, Elgamal, DSS, Diffie-Hellman, Guillou-Quisquater, Fiat-Shamir and Elliptic Curves
    • RSA support for the key lengths up to 2048 bit
    • Elliptic Curve over GF(p) Cryptography with key lengths up to 320 bit
  • Single DES (56 bit) and Triple DES with 2 or 3 Keys (112 bit or 168 bit), encryption and decryption in ECB, CBC and CBC-MAC mode
  • High-speed AES coprocessor (128-bit parallel processing AES engine)
  • Low-power True Random Number Generator (TRNG) in hardware, AIS-31 compliant
  • SHA1, SHA-224 and SHA-256
  • SEED algorithm
  • MD5
  • On-Chip Key generation
  • CRC calculations
  • Data Authentication Pattern (DAP) for the Supplementary Security Domains
  • Low power and low voltage design using NXP Semiconductors handshaking technology
  • Power-saving SLEEP mode
  • Wake-up from SLEEP mode by any I2C communication request
  • 40 µA typical sleep mode current with I2C pads operated in weak pull-up mode, do not obstruct the bus lines
  • Internally generated CPU clock (typical 62 MHz)
  • 1.62 V to 5.5 V operating voltage range

Additional information

Pin_count

32

Operating_supply_voltage

1.8, 3.3, 5 V

Operating_temperature

-25 to 85 °C

Product_dimensions

5 x 5 x 0.95(Max)

Min_operating_supply_voltage

1.62 V

Ram_size

3.2 Kb

Schedule_b

8542310000

Screening_level

Industrial

Specifications

http://www.nxp.com/documents/short_data_sheet/A700X_FAM_SDS.pdf

Supplier_package

HVQFN EP

Mounting

Surface Mount

Maximum_speed

62 MHz

Eccn

5A992

Бренд

Country_of_origin

Taiwan

Data_memory_size

76.4 Kb

Device_core

MX51

Htsn

8542310001

Тип интерфейса

I2C

Max_operating_supply_voltage

5.5 V

Max_power_dissipation

1000 mW