Description
This family of devices contain an enhanced mid-range 8-bit CPU core. The CPU has 49 instructions. Interrupt capability includes automatic context saving. The hardware stack is 16 levels deep and has Overflow and Underflow Reset capability. Direct, Indirect, and Relative Addressing modes are available. Two File Select Registers (FSRs) provide the ability to read program and data memory. Automatic Interrupt Context Saving 16-level Stack with Overflow and Underflow File Select Registers Instruction Set
- High-Performance RISC CPU:
- C Compiler Optimized Architecture
- Only 49 Instructions
- Up to 28 Kbytes Linear Program Memory Addressing
- Up to 1536 Bytes Linear Data Memory Addressing
- Operating Speed:
- DC – 20 MHz clock input @ 2.5V
- DC – 16 MHz clock input @ 1.8V
- DC – 200 ns instruction cycle
- Interrupt Capability with Automatic Context Saving
- 16-Level Deep Hardware Stack with Optional Overflow/Underflow Reset
- Direct, Indirect and Relative Addressing modes:
- Two full 16-bit File Select Registers (FSRs)
- FSRs can read program and data memory
- Flexible Oscillator Structure:
- 16 MHz Internal Oscillator Block:
- Software selectable frequency range from 16 MHz to 31 kHz
- 31 kHz Low-Power Internal Oscillator
- External Oscillator Block with:
- Four crystal/resonator modes up to 20 MHz
- Three external clock modes up to 20 MHz
- Fail-Safe Clock Monitor
- Allows for safe shutdown if peripheral clock stops
- Two-Speed Oscillator Start-up
- Oscillator Start-up Timer (OST)
- Special Microcontroller Features:
- Operating Voltage Range:
- 2.3V to 5.5V
- Self-Programmable under Software Control
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Programmable Low-Power Brown-Out Reset (LPBOR)
- Extended Watch-Dog Timer (WDT):
- Programmable period from 1ms to 256s
- Programmable Code Protection
- In-Circuit Serial Programming(ICSP) via two pins
- In-Circuit Debug (ICD) via Two Pins
- Enhanced Low-Voltage Programming (LVP)
- Power-Saving Sleep mode
- Sleep mode: 20 nA @ 1.8V, typical
- Watchdog Timer: 300 nA @ 1.8V, typical
- Secondary Oscillator: 600 nA @ 32 kHz, 1.8V, typical
- Analog Features:
- Analog-to-Digital Converter (ADC):
- 10-bit resolution
- 30 external channels
- Two internal channels
- Fixed Voltage Reference (FVR) channel
- Temperature Indicator channel
- Auto acquisition capability
- Conversion available during Sleep
- Dedicated ADC RC oscillator
- Fixed Voltage Reference (FVR) as ADC positive reference
- Voltage Reference module:
- Fixed Voltage Reference (FVR) with 1.024V, 2.048V and 4.096V output levels
- Low-Power Sleep mode
- Low-Power BOR (LPBOR)
- Peripheral Features:
- 53 I/O Pins and 1 Input-only Pin:
- High current sink/source 25 mA/25 mA
- Individually programmable weak pull-ups
- Individually programmable interrupt-on-change (IOC) pins
- Timer0: 8-Bit Timer/Counter with 8-Bit Programmable Prescaler
- Enhanced Timer1, 3, 5:
- 16-bit timer/counter with prescaler
- External Gate Input mode
- Low-power 32 kHz secondary oscillator driver
- Timer2, 4, 6, 8, 10: 8-Bit Timer/Counter with 8-Bit Period Register, Prescaler and
- Ten Capture/Compare/PWM (CCP) modules:
- 16-bit Capture, 200 ns (max. resolution)
- 16-bit Compare, 200 ns (max. resolution)
- 10-bit PWM, 20 kHz @ 10 bits (max. frequency)
- Two Master Synchronous Serial Ports (MSSPs) with SPI and I2CTM with:
- 7-bit address masking
- SMBus/PMBusTM compatibility
- Auto-wake-up on start
- Two Enhanced Universal Synchronous Asynchronous Receiver Transmitters (EUSART):
- RS-232, RS-485 and LIN compatible
- Auto-Baud Detect
