MCU 8-bit MCS251 CISC ROMLess 5V 44-Pin PLCC, EN80C251SB16, Intel

A member of the Intel family of 8-bit MCS 251 microcontrollers, the 8XC251SA/SB/SP/SQ is binary-code compatible with MCS 51 microcontrollers and pin compatible with 40-pin PDIP and 44-pin PLCC MCS 51 microcontrollers. MCS 251 microcontrollers feature an enriched instruction set, linear addressing, and efficient C-language support. The 8XC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip RAM and is available with 8 Kbytes or 16 Kbytes of on-chip ROM/OTPROM/EPROM, or without ROM/OTPROM/EPROM. A variety of features can be selected by new user-programmable configurations.

  • Real-time and Programmed Wait State Bus Operation
  • Binary-code Compatible with MCS® 51
  • Pin Compatible with 44-pin PLCC and 40- pin PDIP MCS 51 Sockets
  • Register-based MCS® 251 Architecture
    • 40-byte Register File
    • Registers Accessible as Bytes, Words, or Double Words
  • Enriched MCS 51 Instruction Set
    • 16-bit and 32-bit Arithmetic and Logic Instructions
    • Compare and Conditional Jump Instructions
    • Expanded Set of Move Instructions
  • Linear Addressing
  • 256-Kbyte Expanded External Code/Data Memory Space
  • ROM/OTPROM/EPROM Options: 16 Kbytes (SB/SQ), 8 Kbytes (SA/SP), or without ROM/OTPROM/EPROM
  • 16-bit Internal Code Fetch
  • 64-Kbyte Extended Stack Space
  • On-chip Data RAM Options: 1-Kbyte (SA/SB) or 512-Byte (SP/SQ)
  • 8-bit, 2-clock External Code Fetch in Page Mode
  • Fast MCS 251 Instruction Pipeline
  • User-selectable Configurations:
    • External Wait States (0-3 wait states)
    • Address Range & Memory Mapping
    • Page Mode
  • 32 Programmable I/O Lines
  • Seven Maskable Interrupt Sources with Four Programmable Priority Levels
  • Three Flexible 16-bit Timer/counters
  • Hardware Watchdog Timer
  • Programmable Counter Array
    • High-speed Output
    • Compare/Capture Operation
    • Pulse Width Modulator
    • Watchdog Timer
  • Programmable Serial I/O Port
    • Framing Error Detection
    • Automatic Address Recognition
  • High-performance CHMOS Technology
  • Static Standby to 16-MHz Operation
  • Complete System Development Support
    • Compatible with Existing Tools
    • New MCS 251 Tools Available: Compiler, Assembler, Debugger, ICE
  • Package Options (PDIP, PLCC, and Ceramic DIP)

Характеристики

Бренд

Pin_count

44

Max_power_dissipation

1500 mW

Min_operating_supply_voltage

4.5 V

Max_operating_supply_voltage

5.5 V

Supplier_package

PLCC

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/INTL/INTLS02947/INTLS02947-1.pdf?hkey=52A5661711E402568146F3353EA87419

Screening_level

Commercial

Schedule_b

8542390000

Ram_size

1 KB

Program_memory_type

ROMLess

Product_dimensions

16.7 x 16.7 x 3.81 mm

Operating_temperature

0 to 70 °C

Country_of_origin

United States

Operating_supply_voltage

5 V

Number_of_timers

3

Number_of_programmable_i_os

32

Mounting

Surface Mount

Maximum_speed

16 MHz

Max_processing_temp

230 to 250

Lead_finish

Matte Tin

Instruction_set_architecture

CISC

Htsn

8542310001

Eccn

EAR99

Data_bus_width

8 Bit

Max_expanded_memory_size

256 KB

Артикул: EN80C251SB16

Описание

A member of the Intel family of 8-bit MCS 251 microcontrollers, the 8XC251SA/SB/SP/SQ is binary-code compatible with MCS 51 microcontrollers and pin compatible with 40-pin PDIP and 44-pin PLCC MCS 51 microcontrollers. MCS 251 microcontrollers feature an enriched instruction set, linear addressing, and efficient C-language support. The 8XC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip RAM and is available with 8 Kbytes or 16 Kbytes of on-chip ROM/OTPROM/EPROM, or without ROM/OTPROM/EPROM. A variety of features can be selected by new user-programmable configurations.

  • Real-time and Programmed Wait State Bus Operation
  • Binary-code Compatible with MCS® 51
  • Pin Compatible with 44-pin PLCC and 40- pin PDIP MCS 51 Sockets
  • Register-based MCS® 251 Architecture
    • 40-byte Register File
    • Registers Accessible as Bytes, Words, or Double Words
  • Enriched MCS 51 Instruction Set
    • 16-bit and 32-bit Arithmetic and Logic Instructions
    • Compare and Conditional Jump Instructions
    • Expanded Set of Move Instructions
  • Linear Addressing
  • 256-Kbyte Expanded External Code/Data Memory Space
  • ROM/OTPROM/EPROM Options: 16 Kbytes (SB/SQ), 8 Kbytes (SA/SP), or without ROM/OTPROM/EPROM
  • 16-bit Internal Code Fetch
  • 64-Kbyte Extended Stack Space
  • On-chip Data RAM Options: 1-Kbyte (SA/SB) or 512-Byte (SP/SQ)
  • 8-bit, 2-clock External Code Fetch in Page Mode
  • Fast MCS 251 Instruction Pipeline
  • User-selectable Configurations:
    • External Wait States (0-3 wait states)
    • Address Range & Memory Mapping
    • Page Mode
  • 32 Programmable I/O Lines
  • Seven Maskable Interrupt Sources with Four Programmable Priority Levels
  • Three Flexible 16-bit Timer/counters
  • Hardware Watchdog Timer
  • Programmable Counter Array
    • High-speed Output
    • Compare/Capture Operation
    • Pulse Width Modulator
    • Watchdog Timer
  • Programmable Serial I/O Port
    • Framing Error Detection
    • Automatic Address Recognition
  • High-performance CHMOS Technology
  • Static Standby to 16-MHz Operation
  • Complete System Development Support
    • Compatible with Existing Tools
    • New MCS 251 Tools Available: Compiler, Assembler, Debugger, ICE
  • Package Options (PDIP, PLCC, and Ceramic DIP)

Детали

Бренд

Pin_count

44

Max_power_dissipation

1500 mW

Min_operating_supply_voltage

4.5 V

Max_operating_supply_voltage

5.5 V

Supplier_package

PLCC

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/INTL/INTLS02947/INTLS02947-1.pdf?hkey=52A5661711E402568146F3353EA87419

Screening_level

Commercial

Schedule_b

8542390000

Ram_size

1 KB

Program_memory_type

ROMLess

Product_dimensions

16.7 x 16.7 x 3.81 mm

Operating_temperature

0 to 70 °C

Country_of_origin

United States

Operating_supply_voltage

5 V

Number_of_timers

3

Number_of_programmable_i_os

32

Mounting

Surface Mount

Maximum_speed

16 MHz

Max_processing_temp

230 to 250

Lead_finish

Matte Tin

Instruction_set_architecture

CISC

Htsn

8542310001

Eccn

EAR99

Data_bus_width

8 Bit

Max_expanded_memory_size

256 KB