Описание
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in a single instruction, executed in one clock cycle. The resulting architecture is compact and code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
- High Performance, Low Power Atmel® AVR® 8-bit Microcontroller
- Advanced RISC Architecture
- 123 Powerful Instructions –Most Single Clock Cycle Execution
- 32 x 8 General Purpose Working Registers
- Fully Static Operation
- Up to 20 MIPS Throughput at 20 MHz
- Non-volatile Program and Data Memories
- 8K Bytes of In-System Programmable Flash Program Memory
- Endurance: 10,000 Write/Erase Cycles
- 256 Bytes of In-System Programmable EEPROM
- Endurance: 100,000 Write/Erase Cycles
- 512 Bytes Internal SRAM
- Optional Boot Code Section with Independent Lock Bits
- Data Retention: 20 Years at 85oC / 100 Years at 25oC
- Peripheral Features
- One 8-bit and one 16-bit Timer/Counter with Two PWM Channels, Each
- Programmable Ultra Low Power Watchdog Timer
- On-chip Analog Comparator
- 10-bit Analog to Digital Converter
- 28 External and 4 Internal, Single-ended Input Channels
- Full Duplex USART with Start Frame Detection
- Master/Slave SPI Serial Interface
- Slave I2C Serial Interface
- Special Microcontroller Features
- Low Power Idle, ADC Noise Reduction, and Power-down Modes
- Enhanced Power-on Reset Circuit
- Programmable Brown-out Detection Circuit with Supply Voltage Sampling
- External and Internal Interrupt Sources
- Pin Change Interrupt on 28 Pins
- Calibrated 8MH–Oscillator with Temperature Calibration Option
- Calibrated 32kH–Ultra Low Power Oscillator
- High-Current Drive Capability on 8 I/O Pins
- I/O and Packages
- 32-lead TQFP, and 32-pad QFN/MLF: 28 Programmable I/O Lines
- Speed Grade
- 0 –2 MH–@ 1.7 –1.8V
- 0 –4 MH–@ 1.8 –5.5V
- 0 –10 MH–@ 2.7 –5.5V
- 0 –20 MH–@ 4.5 –5.5V
