Описание
The ATmega64M1 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega 64M1 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The Microchip ATmega64M1 provides the following features: 64Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 2Kbytes EEPROM, 4Kbytes SRAM, 27 general purpose I/O lines, 32 general purpose working registers, one Motor Power Stage Controller, two flexible Timer/Counters with compare modes and PWM, one UART with HW LIN, an 11-channel 10-bit ADC with two differential input stages with programmable gain, a 10-bit DAC, a programmable Watchdog Timer with Internal Individual Oscillator, an SPI serial port, an On-chip Debug system and four software selectable power saving modes.
- High performance, low power Atmel® AVR® 8-bit microcontroller
- Advanced RISC architecture
- 131 powerful instructions – most single clock cycle execution
- 32 × 8 general purpose working registers
- Fully static operation
- Up to 1 MIPS throughput per MHz
- On-chip 2-cycle multiplier
- Data and non-volatile program memory
- 64KBytes flash of in-system programmable program memory
- 2KBytes of in-system programmable EEPROM
- 4KBytes internal SRAM
- Write/erase cycles: 10,000 flash/ 100,000 EEPROM
- Data retention: 20 years at 85°C/ 100 years at 25°C (1)
- Optional boot code with independent lock bits In-system programming by on-chip boot program True read-while-write operation
- Programming lock for flash program and EEPROM data security
- On-chip debug interface (debug WIRE)
- CAN 2.0A/B with six message objects – ISO 16845 certified
- LIN 2.1 and 1.3 controller or 8-bit UART
- One 12-bit high speed PSC (power stage controller)
- Non overlapping inverted PWM output pins with flexible dead-time
- Variable PWM duty cycle and frequency
- Synchronous update of all PWM registers
- Auto stop function for emergency event
- Peripheral features
- One 8-bit general purpose timer/counter with separate presale, compare mode and capture mode
- One 16-bit general purpose timer/counter with separate presale, compare mode and capture mode
- One master/slave SPI serial interface
- 10-bit ADC Up to 11 single ended channels and three fully differential ADC channel pairs Programmable gain (5×, 10×, 20×, 40×) on differential channels Internal reference voltage Direct power supply voltage measurement
- 10-bit DAC for variable voltage reference (comparators, ADC)
- Four analog comparators with variable threshold detection
- 100µA ±2% current source (LIN node identification)
- Interrupt and wake-up on pin change
- Programmable watchdog timer with separate on-chip oscillator
- On-chip temperature sensor
- Special microcontroller features
- Low power idle, noise reduction, and power down modes
- Power on reset and programmable brown-out detection
- In-system programmable via SPI port
- High precision crystal oscillator for CAN operations (16MHz)
- Internal calibrated RC oscillator (8MHz)
- On-chip PLL for fast PWM (32MHz, 64MHz) and CPU (16MHz)
- Operating voltage: 2.7V – 5.5V
- Extended operating temperature:
- -40°C to +85°C
- Core speed grade:
- 0 – 8MHz @ 2.7 – 4.5V
- 0 – 16MHz @ 4.5 – 5.5V
