Описание
The Microchip AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega640/1280/1281/2560/2561 provides the following features: 64K/128K/256K bytes of In-System Programmable Flash with Read-While-Write capabilities, 4Kbytes EEPROM, 8Kbytes SRAM, 54/86 general purpose I/O lines, 32 general purpose working registers, Real Time Counter (RTC), six flexible Timer/Counters with compare modes and PWM, four USARTs, a byte oriented 2-wire Serial Interface, a 16-channel, 10-bit ADC with optional differential input stage with programmable gain, programmable Watchdog Timer with Internal Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for accessing the On-chip Debug system and programming and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run.
- High Performance, Low Power Atmel® AVR® 8-Bit Microcontroller
- Advanced RISC Architecture
- 135 Powerful Instructions –Most Single Clock Cycle Execution
- 32 × 8 General Purpose Working Registers
- Fully Static Operation
- Up to 16 MIPS Throughput at 16MHz
- On-Chip 2-cycle Multiplier
- High Endurance Non-volatile Memory Segments
- 64K/128K/256KBytes of In-System Self-Programmable Flash
- 4Kbytes EEPROM
- 8Kbytes Internal SRAM
- Write/Erase Cycles:10,000 Flash/100,000 EEPROM
- Data retention: 20 years at 85?C/ 100 years at 25?C
- Optional Boot Code Section with Independent Lock Bits
- In-System Programming by On-chip Boot Program
- True Read-While-Write Operation
- Programming Lock for Software Security
- Endurance: Up to 64Kbytes Optional External Memory Space
- Atmel® QTouch® library support
- Capacitive touch buttons, sliders and wheels
- QTouch and QMatrix acquisition
- Up to 64 sense channels
- JTAG (IEEE® std. 1149.1 compliant) Interface
- Boundary-scan Capabilities According to the JTAG Standard
- Extensive On-chip Debug Support
- Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
- Peripheral Features
- Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
- Four 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode
- Real Time Counter with Separate Oscillator
- Four 8-bit PWM Channels
- Six/Twelve PWM Channels with Programmable Resolution from 2 to 16 Bits (ATmega1281/2561, ATmega640/1280/2560)
- Output Compare Modulator
- 8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560)
- Two/Four Programmable Serial USART (ATmega1281/2561, ATmega640/1280/2560)
- Master/Slave SPI Serial Interface
- Byte Oriented 2-wire Serial Interface
- Programmable Watchdog Timer with Separate On-chip Oscillator
- On-chip Analog Comparator
- Interrupt and Wake-up on Pin Change
