Описание
The AT89LP6440 is a low-power, high-performance CMOS 8-bit microcontroller with 64K bytes of In-System Programmable Flash program memory and 8K bytes of Flash data memory. The device is manufactured using Microchip "s high-density nonvolatile memory technology and is compatible with the industry-standard 8051 instruction set. The AT89LP6440 is built around an enhanced CPU core that can fetch a single byte from memory every clock cycle. In the classic 8051 architecture, each fetch requires 6 clock cycles, forcing instructions to execute in 12, 24 or 48 clock cycles. In the AT89LP6440 CPU, standard instructions need only 1 to 4 clock cycles providing 6 to 12 times more throughput than the standard 8051. Seventy percent of instructions need only as many clock cycles as they have bytes to execute, and most of the remaining instructions require only one additional clock. The enhanced CPU core is capable of 20 MIPS throughput whereas the classic 8051 CPU can deliver only 4 MIPS at the same current consumption. Conversely, at the same throughput as the classic 8051, the new CPU core runs at a much lower speed and thereby greatly reducing power consumption and EMI. The AT89LP6440 provides the following standard features: 64K bytes of In-System Programmable Flash program memory, 8K bytes of Flash data memory, 4352 bytes of RAM, up to 38 I/O lines, three 16-bit timer/counters, up to six PWM outputs, a programmable watchdog timer, two analog comparators, a 10-bit ADC/DAC with 8 input channels, a full-duplex serial port, a serial peripheral interface, a two-wire serial interface, an internal RC oscillator, on-chip crystal oscillator, and a four-level, twelve-vector interrupt system.
- 8-bit Microcontroller Compatible with MCS®51 Products
- Enhanced 8051 Architecture
- Single-clock Cycle per Byte Fetch
- Up to 20 MIPS Throughput at 20 MHz Clock Frequency
- Fully Static Operation: 0 Hz to 20 MHz
- On-chip 2-cycle Hardware Multiplier
- 16×16 Multiply Accumulate Unit
- 256×8 Internal RAM
- 4096×8 Internal Extra RAM
- Up to 4KB Extended Stack in Extra RAM
- Dual Data Pointers
- 4-level Interrupt Priority
- Nonvolatile Program and Data Memory
- 64K Bytes of In-System Programmable (ISP) Flash Program Memory
- 8K Bytes of Flash Data Memory
- Endurance: Minimum 100,000 Write/Erase Cycles
- Serial Interface for Program Downloading
- 64-byte Fast Programming Mode
- 256-Byte User Signature Array
- 2-level Program Memory Lock for Software Security
- In-Application Programming of Program Memory
- Peripheral Features
- Three 16-bit Enhanced Timer/Counters
- Two 8-bit PWM Outputs
- 4-Channel 16-bit Compare/Capture/PWM Array
- Enhanced UART with Automatic Address Recognition and Framing Error Detection
- Enhanced Master/Slave SPI with Double-buffered Send/Receive
- Master/Slave Two-Wire Serial Interface
- Programmable Watchdog Timer with Software Reset
- Dual Analog Comparators with Selectable Interrupts and Debouncing
- 8-channel 10-bit ADC/DAC
- 8 General-purpose Interrupt Pins
- Special Microcontroller Features
- Two-wire On-chip Debug Interface
- Brown-out Detection and Power-on Reset with Power-off Flag
- Active-low External Reset Pin
- Internal RC Oscillator
- Low Power Idle and Power-down Modes
- Interrupt Recovery from Power-down Mode
- I/O and Packages
- Up to 38 Programmable I/O Lines
- 40-lead PDIP or 44-lead TQFP/PLCC or 44-pad VQFN/MLF
- Configurable I/O Modes
- Quasi-bidirectional (80C51 Style)
- Input-Only (Tristate)
- Push-pull CMOS Output
- Open-drain
- Operating Conditions
- 2.4V to 3.6V VDD Voltage Range
- -40° C to 85°C Temperature Range
- 0 to 20 MHz @ 2.4
- 3.6V
